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2016 | OriginalPaper | Buchkapitel

Four\(\mathbb {Q}\) on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields

verfasst von : Kimmo Järvinen, Andrea Miele, Reza Azarderakhsh, Patrick Longa

Erschienen in: Cryptographic Hardware and Embedded Systems – CHES 2016

Verlag: Springer Berlin Heidelberg

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Abstract

We present fast and compact implementations of Four\(\mathbb {Q}\) (ASIACRYPT 2015) on field-programmable gate arrays (FPGAs), and demonstrate, for the first time, the high efficiency of this new elliptic curve on reconfigurable hardware. By adapting Four\(\mathbb {Q}\)’s algorithms to hardware, we design FPGA-tailored architectures that are significantly faster than any other ECC alternative over large prime characteristic fields. For example, we show that our single-core and multi-core implementations can compute at a rate of 6389 and 64730 scalar multiplications per second, respectively, on a Xilinx Zynq-7020 FPGA, which represent factor-2.5 and 2 speedups in comparison with the corresponding variants of the fastest Curve25519 implementation on the same device. These results show the potential of deploying Four\(\mathbb {Q}\) on hardware for high-performance and embedded security applications. All the presented implementations exhibit regular, constant-time execution, protecting against timing and simple side-channel attacks.

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Fußnoten
1
The scalar unit outputs digits in the order \(d_0, d_1, \ldots , d_{64}\) and the core uses them in a reversed order (see Algorithm 1).
 
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Metadaten
Titel
Four on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Large Prime Characteristic Fields
verfasst von
Kimmo Järvinen
Andrea Miele
Reza Azarderakhsh
Patrick Longa
Copyright-Jahr
2016
Verlag
Springer Berlin Heidelberg
DOI
https://doi.org/10.1007/978-3-662-53140-2_25

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