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Open Access 2014 | OriginalPaper | Buchkapitel

13. Intel Galileo I/O and Muxing

verfasst von : Manoel Carlos Ramon

Erschienen in: Intel® Galileo and Intel® Galileo Gen 2

Verlag: Apress

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Abstract

Table A-1 presents the I/O mappings for Intel Galileo. This table is the official port I/O mapping provided by Intel and also can be found accessing " https://communities.intel.com/docs/DOC-21920 ".
Table A-1 presents the I/O mappings for Intel Galileo. This table is the official port I/O mapping provided by Intel and also can be found accessing “https://communities.intel.com/docs/DOC-21920”.
Table A-1.
Intel Galileo I/O Mappings
Pin
GPIO
  
PWM Linux
Int
Dir
Muxed with
 
Source
Pin
Linux
    
IO0
Cypr
GPORT4_BIT6_PWM2
50
N/A
-
BI
UART0_RXD
IO1
Cypr
GPORT4_BIT7_PWM0
51
N/A
-
BI
UART0_TXD
IO2
SoC (Cypr)
GPIO<6> (GPORT2_BIT0_PWM6_A3)
14 (32*)
-
0
BI
-
IO3
SoC (Cypr)
GPIO<7> (GPORT0_BIT2_PWM3)
15 (18*)
3
1
BI
(PWM)
IO4
Cypr
GPORT1_BIT4_PWM6
28
 
-
BI
-
IO5
Cypr
GPORT0_BIT1_PWM5
17
5
-
BI
(PWM)
IO6
Cypr
GPORT1_BIT0_PWM6
24
6
-
BI
(PWM)
IO7
Cypr
GPORT1_BIT3_PWM0
27
 
-
BI
-
IO8
Cypr
GPORT1_BIT2_PWM2
26
 
-
BI
-
IO9
Cypr
GPORT0_BIT3_PWM1
19
1
-
BI
(PWM)
IO10
Cypr
GPORT0_BIT0_PWM7
16
7
-
BI
(PWM) SPI1_SS_B
IO11
Cypr
GPORT1_BIT1_PWM4
25
4
-
BI
(PWM) SPI1_MOSI
IO12
Cypr
GPORT3_BIT2_PWM3
38
 
-
BI
SPI1_MISO
IO13
Cypr
GPORT3_BIT3_PWM1
39
 
-
BI
SPI1_SCK
IO14
Cypr
GPORT4_BIT0_PWM6
44
 
-
BI
AD7298:VIN0
IO15
Cypr
GPORT4_BIT1_PWM4
45
 
-
BI
AD7298:VIN1
IO16
Cypr
GPORT4_BIT2_PWM2
46
 
-
BI
AD7298:VIN2
IO17
Cypr
GPORT4_BIT3_PWM0
47
 
-
BI
AD7298:VIN3
IO18
Cypr
GPORT4_BIT4_PWM6
48
 
-
BI
AD7298:VIN4
IO19
Cypr
GPORT4_BIT5_PWM4
49
 
-
BI
AD7298:VIN5
Following are acronyms for Table A-1:
  • Cypr: Crypress GPIO Expander
  • BI: Bidirectional
  • I: Input without pull-up off
  • Int: Interruption pins
  • Dir: Direction
Table A-2 presents the Mux Selectors for Intel Galileo.
Table A-2.
Intel Galileo Muxing
Mux Selector
Cypress GPIO pin
Linux GPIO ID
Dir
Initial Setup
0
1
    
UART0_RXD
IO0
GPORT3_BIT4_PWM7
40
O
U
UART0_TXD
IO1
GPORT3_BIT5_PWM5
41
O
U
SPI1_SS_B
IO10
GPORT3_BIT6_PWM3
42
O
U
SPI1_MOSI
IO11
GPORT3_BIT7_PWM1
43
O
U
SPI1_MISO
IO12
GPORT5_BIT2_PWM3
54
O
U
SPI1_SCK
IO13
GPORT5_BIT3_PWM1
55
O
U
AD7298:VIN0
IO14
GPORT3_BIT1_PWM5
37
O
LOW
AD7298:VIN1
IO15
GPORT3_BIT0_PWM7
36
O
LOW
AD7298:VIN2
IO16
GPORT0_BIT7_PWM1
23
O
LOW
AD7298:VIN3
IO17
GPORT0_BIT6_PWM3
22
O
LOW
AD7298:VIN4
IO18
GPORT0_BIT5_PWM5
21
O
LOW
AD7298:VIN5
IO19
GPORT0_BIT4_PWM7
20
O
LOW
IO2 via SoC GPIO<6>
IO2 via Cypress GPORT2_BIT0_PWM6
GPORT1_BIT7_PWM0
31
O
U
IO3 via SoC GPIO<7>
IO3 via Cypress GPORT0_BIT2_PWM3
GPORT1_BIT6_PWM2
30
O
U
I2C
(AD7298:VIN4 or IO18) and (AD7298:VIN5 or IO19)
GPORT1_BIT5_PWM4
29
O
HIGH
Following are acronyms for Table A-2:
  • O: Output
  • Dir: Direction
  • U: Undefined
The following commands demonstrated some examples how to use the table using Linux terminal shell:
  • Setting IO7 as GPIO output:
echo -n "27" > /sys/class/gpio/export
echo -n "out" > /sys/class/gpio/gpio27/direction
echo 0 > /sys/class/gpio/gpio27/value # will set OUTPUT as LOW
echo 1 > /sys/class/gpio/gpio27/value # will set OUTPUT as HIGH
  • Setting IO7 as GPIO input:
echo -n "27" > /sys/class/gpio/export
echo -n "in" > /sys/class/gpio/gpio27/direction
cat /sys/class/gpio/gpio27/value
Open Access This chapter is licensed under the terms of the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License (http://​creativecommons.​org/​licenses/​by-nc-nd/​4.​0/​), which permits any noncommercial use, sharing, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence and indicate if you modified the licensed material. You do not have permission under this licence to share adapted material derived from this chapter or parts of it.
The images or other third party material in this chapter are included in the chapter’s Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the chapter’s Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder.
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Metadaten
Titel
Intel Galileo I/O and Muxing
verfasst von
Manoel Carlos Ramon
Copyright-Jahr
2014
Verlag
Apress
DOI
https://doi.org/10.1007/978-1-4302-6838-3_13

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