Radiation Effects on Embedded Systems

Radiation belts, solar flares and cosmic rays are at the origin of the space radioactive environment. Electrons and protons of the radiation belts as well as protons from the Sun coronal mass ejection lead to total dose effects on electronic devices. Cosmic rays and heavy ions solar flares are responsible for heavy ions effects. In the first part of this paper, we will review these radiation effects. In the second part of this paper, we will address the effects of the atomic oxygen which can affect LEO satellites, the effects of solar U.V, as well as the micrometeoroid effects and finally the man made space debris.

Understanding the effects of radiation on electronic devices and circuits is particularly important for space applications because the electronics may be exposed to a variety of energetic particles and photons. The resulting effects may be manifested as long-term parametric degradation or as transient changes in the state of the circuits. This paper presents an overview of these effects, emphasizing those device-level effects that are particularly relevant for space environments. MOS and bipolar technologies are considered. A new simulation method for analyzing single-event effects, based on detailed descriptions of a large number of individual events, is described. This method has the potential to provide more accurate analysis than conventional methods based on simulation of the device response to an average event.

Spacecraft anomalies due to radiation effects on electronic devices have been known since the very beginning of the space era. This chapter will describe a sample of known cases of cumulated or transient effects. A brief overview of environment monitors and technology experiments will also be made.

The problem of analyzing the effects of transient faults in a digital system is very complex, and it may be addressed successfully only if it is performed at different steps of the design process. In this work we report and overview of fault injection, discussing which techniques are available that can be used starting from the early conception of the system and arriving to the transistor level.

Radiation effects translated into Single Event Transients (SETs) and Single Event Upsets (SEUs) are dealt with, in this chapter, in the realm of analog and mixed-signal circuits. First of all, we revisit concepts and methods of the analog testing field looking for techniques that may help mitigating, at the system level, SETs and SEUs in these circuits. Then, two mixed-signal case studies are presented. The first case study investigates the effects of SEUs in a new kind of analog circuit: the Field Programmable Analog Arrays (FPAAs). Some FPAA devices are based on SRAM memory cells to implement the user programmability. For this reason the effect of radiation in such circuits can be as dangerous as it is for FPGAs. BIT-flip experiments are performed in a commercial FPAA, and the obtained results show that a single BIT inversion can result in a very different configuration of that previously programmed into the device. The second case study is focused on ΣΔ A/D Converters. A MatLab-based model of such converter is built and a series of fault injection experiments is performed. The results show that the ΣΔ converter can be used in radiation environment, if its digital part is protected. Such protection can be achieved by adopting some design directives. This chapter ends by proposing the use of online analog test methods, in particular self-checking circuits, that can be applied to detect SET and SEU faults during the circuit operation, therefore allowing the design of self-recovering systems.

This paper describes use the of a pulsed laser for studying radiationinduced single-event effects in integrated circuits. The basic failure mechanisms and the fundamentals of the laser testing method are presented. Sample results are presented to illustrate the benefits of using a pulsed laser for studying single-event upsets in memories.

Application-Specific Integrated Circuits (ASICs) can be effectively hardened against radiation effects by design, an approach that is commonly known as “Hardening By Design” (HBD). This contribution describes several HBD methodologies that are commonly used in CMOS technologies to protect the circuit from both Total Ionizing Dose (TID) and Single Event Effects (SEE).

This chapter is dedicated to the effects of radiation on programmable circuits. It is described the radiation effects on integrated circuits manufactured using CMOS process and it is explained in detail the difference between the effects of a SEU in an ASIC and in a SRAM-based FPGA architecture. It is also discussed some SEU mitigation techniques that can be applied at the FPGA architectural level. The problem of protecting SRAM-based FPGAs against radiation in the high level description is also defined.

Historically, there has been a lack of CAD tools for the design of online testable circuits. As a consequence, the design of on-line testable circuits is currently being made manually to a large extent. In this paper we detailed an academic tool for the automatic insertion of fault-tolerant structures in designs described at Register Transfer Level (RTL). With this tool, a fault-tolerant version of the design can be automatically produced according to the user specifications. The resulting fault-tolerant design is also described at RTL and can be simulated and synthesized with commercial tools. Examples are shown to demonstrate the capabilities of this approach.

This chapter addresses the field of testing and characterizing the response of electronic devices to radiation exposure. Firstly, a brief overview of the critical parameters that influences the devices degradation or malfunction will be given in order to show how the standards and guidelines deal with them. Then, the most widely used facilities will be described (particle accelerators, radioactive source…) and their domain of application defined.

Evaluating the sensitivity to Single Event Effects of programmable digital integrated circuits (i.e. microprocessors, digital signal processors and field programmable gate arrays) requires specific methodologies and dedicated tools. Indeed, such an evaluation is based on data gathered from tests performed on-line during which the target circuit is exposed to a flux of particles having features (energy, range in Silicon) somewhat representative of the ones the circuit will encounter in its final environment. These experiments, usually called accelerated radiation ground testing, are performed by means of appropriate radiation facilities entailing thus significant development efforts and cost impact. In this chapter an approach will be presented, describing the corresponding hardware as well as software tools developed to deal with such experiments at a reasonable cost versus effort trade-off.

This chapter describes the possibilities of a pulsed laser system for studying radiation-induced single-event transients in integrated circuits. Three case studies are presented to illustrate the benefits of the spatial and temporal resolution of the technique. We use a dedicated software tool for analysing the transient responses obtained during laser testing. This software can extract all the information required for sensitivity evaluation or design hardening.