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2012 | Buch

Basic Building Blocks Kapitel lesen Erstes Kapitel lesen

Guide to FPGA Implementation of Arithmetic Functions

verfasst von: Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó

Verlag: Springer Netherlands

Buchreihe : Lecture Notes in Electrical Engineering

Enthalten in: Springer Professional "Wirtschaft+Technik" , Springer Professional "Technik" , Springer Professional "Wirtschaft"

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SUCHEN

Über dieses Buch

This book is designed both for FPGA users interested in developing new, specific components - generally for reducing execution times –and IP core designers interested in extending their catalog of specific components. The main focus is circuit synthesis and the discussion shows, for example, how a given algorithm executing some complex function can be translated to a synthesizable circuit description, as well as which are the best choices the designer can make to reduce the circuit cost, latency, or power consumption. This is not a book on algorithms. It is a book that shows how to translate efficiently an algorithm to a circuit, using techniques such as parallelism, pipeline, loop unrolling, and others. Numerous examples of FPGA implementation are described throughout this book and the circuits are modeled in VHDL. Complete and synthesizable source files are available for download.

Inhaltsverzeichnis

Frontmatter
Chapter 1. Basic Building Blocks
Abstract
 
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 2. Architecture of Digital Circuits
Abstract
This chapter describes the classical architecture of many digital circuits and presents, by means of several examples, the conventional techniques that digital circuit designers can use to translate an initial algorithmic description to an actual circuit. The main topics are the decomposition of a circuit into Data Path and Control Unit and the solution of two related problems, namely scheduling and resource assignment.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 3. Special Topics of Data Path Synthesis
Abstract
Several important implementation techniques are presented in this chapter. The first one is pipelining, a very commonly used method in systems that process great volumes of data. Self-timing is the topic of the second section. To some extent it can be considered as an extension of the pipelining concept and is especially attractive in the case of very big circuits.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 4. Control Unit Synthesis
Abstract
Modern Electronic Design Automation tools have the capacity to synthesize the control unit from a finite state machine description, or even to extract and synthesize the control unit from a functional description of the complete circuit (Chap. 5). Nevertheless, in some cases the digital circuit designer can himself be interested in performing part of the control unit synthesis.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 5. Electronic Aspects of Digital Design
Abstract
This chapter is devoted to those electronics aspects important for digital circuit design. The digital devices are built with analog components, and then some considerations should be taken into account in order to obtain good and reliable designs.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 6. EDA Tools
Abstract
The Electronic Design Automation (EDA), is a group of software tools for designing electronic systems such as integrated circuit (ASICs), printed circuit boards (PCBs), or reprogrammable hardware as FPGA, etc. The general ideas of EDA tools and the particular for FPGA designs will be discussed in this section. Typically these tools work in a design flow that hardware and system designers use to design and analyze entire system behavior. This chapter explains the main concepts related to the EDA tools and presents an example using Xilinx ISE and Altera Quartus tools.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 7. Adders
Abstract
Addition is a primitive operation for most arithmetic functions, so that FPGA vendors have dedicated a particular attention to the design of optimized adders. As a consequence, in many cases the synthesis tools are able to generate fast and cost-effective adders from simple VHDL expressions. Only in the case of relatively long operands can it be worthwhile to consider more complex structures such as carry-skip, carry-select and logarithmic adders.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cant
Chapter 8. Multipliers
Abstract
Multiplication is a basic arithmetic operation whose execution is based on 1-digit by 1-digit multipliers and multi-operand adders. Most FPGA families include the basic components for implementing fast and cost-effective multipliers. Furthermore, they also include optimized fixed-size multipliers which, in turn, can be used for implementing larger-size multipliers.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 9. Dividers
Abstract
Division is a basic arithmetic operation whose execution is based on 1-digit by m-digit multiplications and subtractions. Nevertheless, unlike addition and multiplication, division is generally not included as a predefined block within FPGA families. So, in many cases, the circuit designer will have to generate dividers by choosing some division algorithm and implementing it with adders and multipliers.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 10. Other Operations
Abstract
This chapter is devoted to arithmetic functions and operations other than the four basic ones. The conversion of binary numbers to radix-B ones, and conversely, is dealt with in Sects. 10.1 and 10.2. An important particular case is B = 10 as human interfaces generally use decimal representations while internal computations are performed with binary circuits.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 11. Decimal Operations
Abstract
In a number of computer arithmetic applications, decimal systems are preferred to the binary ones. The reasons come, not only from the complexity of coding/decoding interfaces but, mostly from the lack of precision in the results of the binary systems.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 12. Floating Point Arithmetic
Abstract
There are many data processing applications (e.g. image and voice processing), which use a large range of values and that need a relatively high precision. In such cases, instead of encoding the information in the form of integers or fixed-point numbers, an alternative solution is a floating-point representation. In the first section of this chapter, the IEEE standard for floating point is described. The next section is devoted to the algorithms for executing the basic arithmetic operations. The two following sections define the main rounding methods and introduce the concept of guard digit. Finally, the last few sections propose basic implementations of the arithmetic operations, namely addition and subtraction, multiplication, division and square root.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 13. Finite-Field Arithmetic
Abstract
Finite fields are used in different types of computers and digital communication systems. Two well-known examples are error-correction codes and cryptography. The traditional way of implementing the corresponding algorithms is software, running on general-purpose processors or on digital-signal processors. Nevertheless, in some cases the time constraints cannot be met with instruction-set processors, and specific hardware must be considered.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 14. Systems on Chip
Abstract
This chapter introduces the main concepts related to the implementation of embedded systems on FPGA devices. Many of these concepts will appear during the case studies that are exposed in the next chapter.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 15. Embedded Systems Development: Case Studies
Abstract
Embedded systems are computers designed and programmed to meet the requirements of a specific application. Applications may not require an OS (Operating System) or may rely on a customized OS. The system architecture is usually composed of a low-cost microprocessor, memory and peripherals interconnected through busses. It may also include a coprocessor to speed-up a specific computation.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Chapter 16. Partial Reconfiguration on Xilinx FPGAs
Abstract
Partial Reconfiguration (PR) is the ability to change a portion (the reconfigurable partition) of the device without disturbing the normal operation of the rest (the static partition). A typical PR application is a reconfigurable coprocessor which switches the configuration of the reconfigurable partition at run-time when required by the application. The main advantage is the ability to map different coprocessor configurations in the reconfigurable partition in a time-multiplexed way, reducing the required area.
Jean-Pierre Deschamps, Gustavo D. Sutter, Enrique Cantó
Backmatter
Metadaten
Titel
Guide to FPGA Implementation of Arithmetic Functions
verfasst von
Jean-Pierre Deschamps
Gustavo D. Sutter
Enrique Cantó
Copyright-Jahr
2012
Verlag
Springer Netherlands
Electronic ISBN
978-94-007-2987-2
Print ISBN
978-94-007-2986-5
DOI
https://doi.org/10.1007/978-94-007-2987-2

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