Memphis: a framework for heterogeneous many-core SoCs generation and validation

This work presents Memphis, which comprises a flexible EDA framework and a many-core model for heterogeneous SoCs. The framework, together with the many-core model supports the integration of processors, network interfaces, routers, and peripherals. A set of tools enable a decoupled generation and compilation of the hardware, operating systems, and applications. The hardware model is cycle-accurate, with a SystemC model to speed up simulation time and a VHDL model enabling prototyping in FPGAs devices. The framework provides a rich set of graphical debugging tools enabling an easy and intuitive understanding of computation and communication events happening at runtime. The coupled integration of the platform model to the EDA framework makes Memphis well suited to be employed in research and teaching. As case studies, we provide a set of evaluations addressing the many-core generation, simulation, and debugging. Different applications sets were employed, enabling to characterize the computation and communication performance of the many-core, as well as, evaluate an AES encryption application performance according to different levels of parallelism.