Skip to main content
Fachgebiete
Automobil + Motoren Bauwesen + Immobilien Business IT + Informatik Elektrotechnik + Elektronik Energie + Nachhaltigkeit Finance + Banking Management + Führung Marketing + Vertrieb Maschinenbau + Werkstoffe Versicherung + Risiko
DE
EN
Bücher
Zeitschriften
Themenseiten
Organisationspsychologie Projektmanagement Marketing Smart Manufacturing
Weitere Formate
Podcasts Webinare Technik Webinare Wirtschaft Kongresse Veranstaltungskalender Awards
Jetzt Einzelzugang starten
Zugang für Unternehmen
Referenzkunden
SLX-Digitalkonferenz: Zukunftswerkstatt 2024

Mehr Umsatz mit Top-Kontakten

Am 7. Mai erfahren Sie, wie Vertriebsteams Leadgenerierung, Leadnurturing und Leadstrategien effizient steuern können.
Erweiterte Suche
Anmelden
nach oben

1990 | Buch

Introduction to Mixed-Mode Simulation Kapitel lesen Erstes Kapitel lesen

Mixed-Mode Simulation

verfasst von: Resve A. Saleh, A. Richard Newton

Verlag: Springer US

Buchreihe : The International Series in Engineering and Computer Science

Enthalten in: Professional Book Archive

Einloggen, um Zugang zu erhalten
insite
SUCHEN

Über dieses Buch

Our purpose in writing this book was two-fold. First, we wanted to compile a chronology of the research in the field of mixed-mode simulation over the last ten to fifteen years. A substantial amount of work was done during this period of time but most of it was published in archival form in Masters theses and Ph. D. dissertations. Since the interest in mixed-mode simulation is growing, and a thorough review of the state-of-the-art in the area was not readily available, we thought it appropriate to publish the information in the form of a book. Secondly, we wanted to provide enough information to the reader so that a proto­ type mixed-mode simulator could be developed using the algorithms in this book. The SPLICE family of programs is based on the algorithms and techniques described in this book and so it can also serve as docu­ mentation for these programs. ACKNOWLEDGEMENTS The authors would like to dedicate this book to Prof. D. O. Peder­ son for inspiring this research work and for providing many years of support and encouragement The authors enjoyed many fruitful discus­ sions and collaborations with Jim Kleckner, Young Kim, Alberto Sangiovanni-Vincentelli, and Jacob White, and we thank them for their contributions. We also thank the countless others who participated in the research work and read early versions of this book. Lillian Beck provided many useful suggestions to improve the manuscript. Yun­ cheng Ju did the artwork for the illustrations.

Inhaltsverzeichnis

Frontmatter
Chapter 1. Introduction to Mixed-Mode Simulation
Abstract
Computer simulation is used in a variety of different fields to predict the behavior of physical systems whenever it is inappropriate, or too expensive, to build the actual system to observe its behavior. In electrical engineering, circuit simulation is used routinely in the design of integrated circuits (IC) to verify circuit correctness and to obtain detailed timing information before an expensive and time-consuming fabrication process is performed. In fact, it is one of the most heavily used computer-aided design (CAD) tools in terms of CPU-time in the IC design cycle. The popularity of this form of simulation is primarily due to its reliability and its ability to provide precise electrical waveform information for circuits containing complex devices and all associated parasitics.
Resve A. Saleh, A. Richard Newton
Chapter 2. Electrical Simulation Techniques
Abstract
The features of circuit or electrical simulation are extremely important in mixed-mode simulation as they determine the overall speedup and efficiency of the simulator. This chapter describes the basic theory and foundations for the electrical simulation techniques. First the circuit equations are formulated in Section 2.1 and the standard techniques are described in Section 2.2. The issues pertaining to time step selection and simulation accuracy are also addressed. The limitations of these techniques for large problems are identified and alternative approaches are described in the next chapter.
Resve A. Saleh, A. Richard Newton
Chapter 3. Relaxation-Based Simulation Techniques
Abstract
The overall goal in circuit simulation is to generate the solution as efficiently as possible while providing the desired level of accuracy. As described in the last chapter, the standard approach to solving Eq. (2.1) is to use a numerical integration method. One way to make the integration process efficient is to simply minimize the total number of time points used. That is, at any stage during the simulation, take the largest step possible that provides the required accuracy. This strategy is effective for linear problems, assuming that the numerical integration method has guaranteed stability properties but does not guarantee a smaller runtime. In fact, for nonlinear problems, it may be more efficient to take smaller steps so that the iterative method used to solve the nonlinear algebraic equations converges in fewer iterations. Using small time-steps also improves the accuracy of the solution. Therefore, minimizing the total number of iterations is a more useful goal in reducing the amount of computation.
Resve A. Saleh, A. Richard Newton
Chapter 4. Iterated Timing Analysis
Abstract
In the previous two chapters, the circuit simulation problem was identified and efficient techniques to solve the problem were described. In this chapter, a detailed description of event-driven electrical simulation based on nonlinear relaxation methods is provided. The chapter begins with the equation flow for nonlinear relaxation when applied to the circuit simulation problem. Then the timing analysis and iterated timing analysis (ITA) algorithms are described. An algorithm for event-driven electrical simulation with a global variable time step approach is given in the next section. Finally, the issues relating to latency detection and event scheduling in ITA are discussed.
Resve A. Saleh, A. Richard Newton
Chapter 5. Gate-Level Simulation
Abstract
When the complexity of an integrated circuit design reaches the point where electrical analysis is no longer cost-effective, logic simulation or gate-level simulation may be used. Rather than dealing with voltages and currents at signal nodes, discrete logic states are used. In essence, logic analysis may be viewed as a simplification of timing analysis, described in the previous chapter, where the difference equations are replaced by a set of discrete state equations and only simple Boolean operations are required to obtain new logic values at each node. These Boolean operations are generally the most efficient ones available on a digital computer. In a classical logic simulator, transistors are usually grouped into logic gates wherever possible and modeled at the gate-level rather than at the individual transistor level. This form of simplification, sometimes referred to as macromodeling, can result in greatly enhanced execution speed by reducing both the number of models to be processed and simplifying the arithmetic operations required to process each transistor group. With event-driven, selective trace analysis and the above simplifications, asynchronous logic simulators are typically 100 to 1000 times faster than the most efficient forms of electrical analysis.
Resve A. Saleh, A. Richard Newton
Chapter 6. Switch-Level Timing Simulation
Abstract
Most modern logic simulators handle the problems specific to MOS integrated circuits by including the notion of signal strength in the logic model. However, the use of strength does not, by itself, solve all the modeling problems inherent to MOS circuits. For example, circuit designers use many combinations of transistors which do not have a direct mapping to a logic gate and therefore cannot be represented conveniently at the gate level. It is also difficult to model the logic operation of dynamic circuits in a convenient form in a standard logic simulator. Transfer gates further complicate the situation because they introduce dynamic loading effects, bidirectional signal flow, and capacitive charge-sharing effects. Many of these problems were resolved with the advent of the switch-level modeling and simulation technique [BRY80].
Resve A. Saleh, A. Richard Newton
Chapter 7. Implementation of Mixed-Mode Simulation
Abstract
This chapter describes the issues involved in implementing a mixed-mode simulator. The iSPLICE3 program [SAL89A] is used as a case study since it uses many of the algorithms described in the previous three chapters. The chapter begins with an overview of the architecture of iSPLICE3. Then, the issues associated with the implementation of an event scheduler are presented. Following this, the event scheduling issues during the transient analysis are described. Next, the techniques used to obtain the dc solution are provided. Finally, a number of simulation results using industrial examples are presented to indicate the performance of the program compared to SPICE2.
Resve A. Saleh, A. Richard Newton
Chapter 8. Conclusions and Future Work
Summary
A variety of techniques for mixed-mode simulation have been described in this book, focusing primarily on the combination of the gate-level, switch-level timing and electrical forms of simulation. Chapter 1 began with an overview of the different levels of simulation and provided the motivation for combining two or more levels into one simulator. Then, the basic issues in mixed-mode simulation were outlined and a brief survey of existing mixed-mode simulators was provided. In Chapter 2, the electrical simulation problem was formulated and the standard numerical techniques used to solve the problem were presented. The issues associated with the implementation of an efficient time-step control scheme were also described. In Chapter 3, two properties of waveforms, called latency and multirate behavior, were defined and used to motivate the need for new circuit simulation methods. Then, relaxation-based electrical simulation methods were introduced to exploit these waveform properties, and their theoretical aspects were described. Circuit partitioning methods to improve the convergence speed of relaxation methods were presented at the end of the chapter.
The electrical, gate-level and switch-level timing simulation algorithms were presented in Chapters 4, 5 and 6, respectively. These techniques make use of the event-driven, selective-trace paradigm which forms a common thread for all algorithms used in mixed-mode simulation. The main contribution of Chapter 4 was an event-driven circuit simulation algorithm to exploit latency. The evolution of logic states and logic delay models was presented in Chapter 5. The development of the Elogic simulation and modeling approach to resolve the signal mapping problems at the interface between electrical and logic elements was described in Chapter 6.
In Chapter 7, the implementation details of the iSPLICE3 mixed- mode simulator were presented. First, the overall architectural issues were described followed by a summary of the transient analysis techniques used and event scheduling policies enforced between the different levels of simulation. The issues associated with the implementation of event schedulers for mixed-mode simulators were also described in detail. A technique for the dc solution of mixed-level circuits was outlined. Finally, a number of mixed-mode simulation examples were provided.
Resve A. Saleh, A. Richard Newton
Backmatter
Metadaten
Titel
Mixed-Mode Simulation
verfasst von
Resve A. Saleh
A. Richard Newton
Copyright-Jahr
1990
Verlag
Springer US
Electronic ISBN
978-1-4613-0695-5
Print ISBN
978-1-4612-8030-9
DOI
https://doi.org/10.1007/978-1-4613-0695-5