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Erschienen in:
2016 | OriginalPaper | Buchkapitel
5. Sequential Logic Design
verfasst von : Vaibbhav Taraate
Erschienen in: Digital Logic Design Using Verilog
Verlag: Springer India
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Abstract
This chapter describes the detail practical understanding about the sequential logic designs. RTL coding using Verilog is described in detail with the practical scenarios and concepts. The Verilog RTL for the flip-flops, latches, various counters, shift registers, and memories is covered with the synthesized results and explanations. The practical do’s and don’ts are explained with the meaningful diagrams and timing sequences. This chapter will be useful for the ASIC designers while coding for the sequential logic. This chapter also covers the necessity of registered input and register outputs.