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2015 | OriginalPaper | Buchkapitel

Steiner Trees with Bounded RC-Delay

verfasst von : Rudolf Scheifele

Erschienen in: Approximation and Online Algorithms

Verlag: Springer International Publishing

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Abstract

We consider the Minimum Elmore Delay Steiner Tree Problem, which arises as a key problem in the routing step in VLSI design: Here, we are given a set of pins located on the chip which have to be connected by metal wires in order to make the propagation of electrical signals possible. Challenging timing constraints require that these electrical signals travel as fast as possible. This is modeled as a problem of constructing a Steiner tree minimizing the Elmore delay [9] between a source vertex and a set of sink vertices. The problem is strongly \(NP\)-hard even for very restricted special cases, and although it is central in VLSI design (see e.g. [18]), no approximation algorithms were known until today.
In this work, we give the first constant-factor approximation algorithm. The algorithm achieves an approximation ratio of \(3.39\) in the rectilinear plane and \(4.11\) in metric graphs. We also demonstrate that our algorithm brings improvements on real world VLSI instances compared to the currently used standard method of computing short Steiner trees.

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Fußnoten
1
The Hanan Grid is the grid that is induced by the set of \(x\)- and \(y\)-coordinates of the vertices in \(\left\{ s \right\} \cup T\) – see Hanan [13].
 
2
Every general Steiner tree can be transformed into such a tree in linear time by adding additional Steiner points and edges of length \(0\).
 
3
\(\beta \le 2\) can always be assumed by not using anything worse than a minimum terminal spanning tree as initial solution.
 
4
A rectilinear minimum spanning tree can be computed in \(\mathcal {O}(|T| \log |T|)\) time using only edges of the Delaunay Triangulation.
 
5
The actual algorithm used is depending on the size of the terminal set.
 
Literatur
1.
Zurück zum Zitat Arora, S.: Polynomial time approximation schemes for euclidean traveling salesman and other geometric problems. J. ACM 45, 753–782 (1998)CrossRefMATHMathSciNet Arora, S.: Polynomial time approximation schemes for euclidean traveling salesman and other geometric problems. J. ACM 45, 753–782 (1998)CrossRefMATHMathSciNet
2.
Zurück zum Zitat Boese, K.D., Kahng, A.B., McCoy, B.A., Robins, G.: Fidelity and near-optimality of elmore-based routing constructions. In: IEEE International Conference on Computer Design, pp. 81–84 (1993) Boese, K.D., Kahng, A.B., McCoy, B.A., Robins, G.: Fidelity and near-optimality of elmore-based routing constructions. In: IEEE International Conference on Computer Design, pp. 81–84 (1993)
3.
Zurück zum Zitat Boese, K.D., Kahng, A.B., McCoy, B.A., Robins, G.: Rectilinear steiner trees with minimum elmore delay. In: Proceedings of the 31st Annual Design Automation Conference, pp. 381–386. ACM, New York (1994) Boese, K.D., Kahng, A.B., McCoy, B.A., Robins, G.: Rectilinear steiner trees with minimum elmore delay. In: Proceedings of the 31st Annual Design Automation Conference, pp. 381–386. ACM, New York (1994)
4.
Zurück zum Zitat Boese, K.D., Kahng, A.B., McCoy, B.A., Robins, G.: Near-optimal critical sink routing tree constructions. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 14, 1417–1436 (1995)CrossRef Boese, K.D., Kahng, A.B., McCoy, B.A., Robins, G.: Near-optimal critical sink routing tree constructions. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 14, 1417–1436 (1995)CrossRef
5.
Zurück zum Zitat Byrka, J., Grandoni, F., Rothvoss, T., Sanità, L.: Steiner tree approximation via iterative randomized rounding. J. ACM 60, 6:1–6:33 (2013)CrossRef Byrka, J., Grandoni, F., Rothvoss, T., Sanità, L.: Steiner tree approximation via iterative randomized rounding. J. ACM 60, 6:1–6:33 (2013)CrossRef
6.
Zurück zum Zitat Chu, C., Wong, Y.C.: FLUTE: fast lookup table based rectilinear steiner minimal tree algorithm for VLSI design. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 27, 70–83 (2008)CrossRef Chu, C., Wong, Y.C.: FLUTE: fast lookup table based rectilinear steiner minimal tree algorithm for VLSI design. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 27, 70–83 (2008)CrossRef
7.
Zurück zum Zitat Córdova, J., Lee, Y.: A heuristic algorithm for the rectilinear steiner arborescence problem. Technical report, University of Puerto Rico, Computer Science Department (1994) Córdova, J., Lee, Y.: A heuristic algorithm for the rectilinear steiner arborescence problem. Technical report, University of Puerto Rico, Computer Science Department (1994)
9.
Zurück zum Zitat Elmore, W.: The transient response of damped linear networks with particular regard to wideband amplifiers. J. Appl. Phys. 19, 55–63 (1948)CrossRef Elmore, W.: The transient response of damped linear networks with particular regard to wideband amplifiers. J. Appl. Phys. 19, 55–63 (1948)CrossRef
10.
11.
Zurück zum Zitat Gester, M., Müller, D., Nieberg, T., Panten, C., Schulte, C., Vygen, J.: BonnRoute: algorithms and data structures for fast and good VLSI routing. ACM Trans. Des. Autom. Electron. Syst. 18, 32:1–32:24 (2013)CrossRef Gester, M., Müller, D., Nieberg, T., Panten, C., Schulte, C., Vygen, J.: BonnRoute: algorithms and data structures for fast and good VLSI routing. ACM Trans. Des. Autom. Electron. Syst. 18, 32:1–32:24 (2013)CrossRef
12.
Zurück zum Zitat Gupta, R., Tutuianu, B., Pileggi, L.: The elmore delay as a bound for RC trees with generalized input signals. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 16, 95–104 (1997)CrossRef Gupta, R., Tutuianu, B., Pileggi, L.: The elmore delay as a bound for RC trees with generalized input signals. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 16, 95–104 (1997)CrossRef
14.
Zurück zum Zitat Held, S., Korte, B., Rautenbach, D., Vygen, J.: Combinatorial optimization in VLSI design. In: Combinatorial Optimization: Methods and Applications, pp. 33–96. IOS Press, Amsterdam (2011) Held, S., Korte, B., Rautenbach, D., Vygen, J.: Combinatorial optimization in VLSI design. In: Combinatorial Optimization: Methods and Applications, pp. 33–96. IOS Press, Amsterdam (2011)
15.
Zurück zum Zitat Held, S., Rotter, D.: Shallow-light steiner arborescences with vertex delays. In: Goemans, M., Correa, J. (eds.) IPCO 2013. LNCS, vol. 7801, pp. 229–241. Springer, Heidelberg (2013) CrossRef Held, S., Rotter, D.: Shallow-light steiner arborescences with vertex delays. In: Goemans, M., Correa, J. (eds.) IPCO 2013. LNCS, vol. 7801, pp. 229–241. Springer, Heidelberg (2013) CrossRef
17.
Zurück zum Zitat Kadodi, T.: Steiner routing based on elmore delay model for minimizing maximum propagation delay. Master’s thesis, Japan Advanced Institute of Science and Technology (1999) Kadodi, T.: Steiner routing based on elmore delay model for minimizing maximum propagation delay. Master’s thesis, Japan Advanced Institute of Science and Technology (1999)
18.
Zurück zum Zitat Kahng, A., Robins, G.: On Optimal Interconnections for VLSI. Kluwer Academic Publishers, Boston (1995)CrossRefMATH Kahng, A., Robins, G.: On Optimal Interconnections for VLSI. Kluwer Academic Publishers, Boston (1995)CrossRefMATH
19.
Zurück zum Zitat Karp, R.: Reducibility among combinatorial problems. In: Miller, R., Thatcher, J. (eds.) Complexity of Computer Computations, pp. 85–103. Plenum Press, New York (1972)CrossRef Karp, R.: Reducibility among combinatorial problems. In: Miller, R., Thatcher, J. (eds.) Complexity of Computer Computations, pp. 85–103. Plenum Press, New York (1972)CrossRef
20.
Zurück zum Zitat Khuller, S., Raghavachari, B., Young, N.: Balancing minimum spanning and shortest path trees. In: Proceedings of the Fourth Annual ACM-SIAM Symposium on Discrete Algorithms, pp. 243–250. Society for Industrial and Applied Mathematics, Philadelphia (1993) Khuller, S., Raghavachari, B., Young, N.: Balancing minimum spanning and shortest path trees. In: Proceedings of the Fourth Annual ACM-SIAM Symposium on Discrete Algorithms, pp. 243–250. Society for Industrial and Applied Mathematics, Philadelphia (1993)
21.
Zurück zum Zitat Korte, B., Vygen, J.: Combinatorial Optimization: Theory and Algorithms, 5th edn. Springer, Heidelberg (2012)CrossRef Korte, B., Vygen, J.: Combinatorial Optimization: Theory and Algorithms, 5th edn. Springer, Heidelberg (2012)CrossRef
22.
Zurück zum Zitat Peyer, S.: Elmore-delay-optimale Steinerbäume and VLSI-Design. Diploma’s thesis (in german), Research Institute for Discrete Mathematics, University of Bonn (2000) Peyer, S.: Elmore-delay-optimale Steinerbäume and VLSI-Design. Diploma’s thesis (in german), Research Institute for Discrete Mathematics, University of Bonn (2000)
23.
Zurück zum Zitat Peyer, S., Zachariasen, M., Jørgensen, D.G.: Delay-related secondary objectives for rectilinear steiner minimum trees. Discret. Appl. Math. 136, 271–298 (2004)CrossRefMATH Peyer, S., Zachariasen, M., Jørgensen, D.G.: Delay-related secondary objectives for rectilinear steiner minimum trees. Discret. Appl. Math. 136, 271–298 (2004)CrossRefMATH
24.
25.
Zurück zum Zitat Rao, S.B., Smith, W.D.: Approximating geometrical graphs via “spanners” and “banyans”. In: Proceedings of the Thirtieth Annual ACM Symposium on Theory of Computing, pp. 540–550. ACM, New York (1998) Rao, S.B., Smith, W.D.: Approximating geometrical graphs via “spanners” and “banyans”. In: Proceedings of the Thirtieth Annual ACM Symposium on Theory of Computing, pp. 540–550. ACM, New York (1998)
26.
Zurück zum Zitat Rubinstein, J., Penfield, P., Horowitz, M.A.: Signal delay in RC tree networks. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 2, 202–211 (1983)CrossRef Rubinstein, J., Penfield, P., Horowitz, M.A.: Signal delay in RC tree networks. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 2, 202–211 (1983)CrossRef
27.
Zurück zum Zitat Scheifele, R.: Steiner trees with bounded elmore delay. Master’s thesis, Research Institute for Discrete Mathematics, University of Bonn (2013) Scheifele, R.: Steiner trees with bounded elmore delay. Master’s thesis, Research Institute for Discrete Mathematics, University of Bonn (2013)
28.
Zurück zum Zitat Shi, W., Su, C.: The rectilinear steiner arborescence problem is NP-complete. SIAM J. Comput. 35, 729–740 (2005)CrossRefMathSciNet Shi, W., Su, C.: The rectilinear steiner arborescence problem is NP-complete. SIAM J. Comput. 35, 729–740 (2005)CrossRefMathSciNet
Metadaten
Titel
Steiner Trees with Bounded RC-Delay
verfasst von
Rudolf Scheifele
Copyright-Jahr
2015
DOI
https://doi.org/10.1007/978-3-319-18263-6_19