5. Transceiver

This chapter describes an 802.15.6 compliant 2.36–2.484 GHz multiband transceiver that uses an energy efficient programmable digital power amplifier on the transit side and a zero power passive voltage gain frontend using a 1:3 balun on the receive side to achieve low power operation. A 7th harmonic injection locked oscillator and zero power passive polyphase filter generates the phases at 2.4 GHz required for phase modulation on the transmit side and for LO generation on the receive side. This enables channel selection using a 342.86 MHz PLL, i.e., at 1/7th of the RF frequency of 2.4 GHz to result in low power consumption. The prototype transmitter consumes 1.48 mW of power while delivering −9.47 dBm output power resulting in an energy efficiency of 1.52 nJ/bit at 971 kbps data rate. The measured RMS EVM for π/4 DQPSK modulation is 5.68%. The prototype receiver consumes 1.29 mW of power resulting in an energy efficiency of 1.32 nJ/bit while achieving a receiver noise figure of 10.2 dB and an IIP3 of −24.1 dBm. This design does not use off-chip inductors.