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Erschienen in:
2010 | OriginalPaper | Buchkapitel
VLSI Design of Four Quadrant Analog Voltage-Mode Multiplier and Its Application
verfasst von : Ankita Tijare, Pravin Dakhole
Erschienen in: Information and Communication Technologies
Verlag: Springer Berlin Heidelberg
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A new CMOS voltage-mode Four-quadrant analog Multiplier is proposed and analyzed. By applying inputs signals to set of complementary diode pair connection & to that of voltage difference circuit. The circuit is formed by cascading the complementary diode pair connection with the voltage difference circuit. Based on the proposed multiplier circuit, a low voltage high performance CMOS four quadrant analog multiplier is designed and fabricated by using 0.35micron technology. The measured 3dB bandwidth is 15 MHz Simple structure, low-voltage, low power, and high performance makes the proposed multiplier quite feasible in many applications.