VLSI Implementation of a Fixed-Complexity Soft-Output MIMO Detector for High-Speed Wireless

Spatial multiplexing is a MIMO technique aimed at maximizing the data throughput by exploiting the degrees of freedom in MIMO channels. Since the multiplexing gain is only available in high SNR region, spatial multiplexing is usually used when high SNR is available. As depicted in Figure 2(a), spatial multiplexing usually requires both and to be large. In general, the degree of freedom (multiplexing gain) is determined by which is the rank of the channel matrix . In case is badly conditioned (e.g. when line-of-sight occurs, becomes a singular matrix), the pseudoinversion of in (15) using linear detection will be very difficult which requires very large dynamic range. In other words, the gain of spatial multiplexing heavily depends on the multipath fading. A dual-stream spatial multiplexing scheme is depicted in Figure 2(a) .

Transmit diversity schemes that exploit the diversity gain of multi-antenna transmission have also been adopted by LTE and WiMAX. The Space-Time Block Coding (STBC) in WiMAX and Space-Frequency Block Coding (SFBC) in LTE [11] are both transmit diversity schemes to transmit data for guaranteed diversity while requiring only a low-complexity symbol detector on the receiver side. In both cases, the Alamouti matrix [12] is used because it is the only full-rate linear STBC (or SFBC) code with a diversity gain of 2. In other words, the transmit diversity schemes considered in this paper are Alamouti schemes in the space and frequency domains. This assumes the channels of either adjacent symbol intervals or subcarriers are identical, so that either time or frequency diversity will be achieved when a single codeword is mapped to different antennas within two adjacent time or frequency intervals. The basic space-frequency channel matrix is defined as

In linear detection such as Zero-forcing (ZF) and Minimum Mean Squared Error (MMSE), the receiver symbol vector is multiplied with a linear filter:

The correlation between the elements in the noise vector is neglected and the symbols in are demodulate individually, treating the output of the model (6) as independent scalar channels. Although linear detectors will incur a severe performance loss in slow fading channels [4], they have very low implementation cost compared to more advanced MIMO detection algorithms which makes them suitable for low-cost real-time implementations. As depicted in Figure 3, the linear detection procedure involves two parts: channel preprocessing and symbol demapping. The channel preprocessing procedure mainly consists of matrix multiplication and inversion as shown in (6) and (7).

The Layered Orthogonal Lattice Detector (LORD) proposed in [13] and the FCSO MIMO detector presented in [4] are similar and use a suboptimal method to reduce the complexity at the cost of negligible performance loss. A general MIMO system using 64-QAM is taken as a case study. Here each complex-valued symbol is considered to be one layer and only the top layer is exactly marginalized with the remaining three layers approximately marginalized. The channel-rate processing of FCSO involves the QRD of rank-reduced channel matrices

which generates an upper triangular matrix , and a unitary matrix so that

Here QRD is needed for different .

The symbol-rate processing consists of the following steps.

(1) Pick one transmitted symbol as the top layer. The entire constellation is enumerated in the exact marginalization ( in (5)) only for . For the candidate in , by canceling its effect on the received symbol vector , a new vector

is computed.

(2) By multiplying with from (9), compute

(3) Based on and , using DFE, can be estimated using hard decision. From this, compute the Euclidean distance

and eventually the log-likelihood ratio (LLR). Taking a 64-QAM system as an example, as shown in the following:

the LLR of the six bits that constitute the top-layer symbol can be computed using (12). This involves the computation of 64 different as shown in (14)

Although the FCSO detector has substantially reduced the complexity compared to MAP detector, further reduction is still needed for a practical implementation with large signal constellations. In the following, further approximations and improvements to FCSO detection, namely Modified FCSO (MFCSO) detector [5], are elaborated. In [4], the entire constellation is enumerated in the exact marginalization ( in (5)). In this paper, instead of searching the full constellation , we propose to sum over only a subset of constellation points around an initial estimate . This initial estimate will be obtained by zero-forcing detection. The size of , denoted by , is chosen to be 16 and 8 in this paper for the complexity and performance comparisons. In effect, the proposed detector is a further approximation of that in [4], which consists of only partially enumerating the symbols selected for exact marginalization (the set in (5)).

Similar to FCSO, the channel-rate processing of MFCSO involves computing QRD times, as shown in (9) and (8). As an overhead compared to FCSO, the coefficient matrix

is needed to perform the ZF/MMSE-based initial estimate of in (16) below. The symbol-rate processing of MFCSO is the following

(1) Linear detection (ZF/MMSE) is carried out to estimate the initial symbol vector

Here is the transmitted symbol vector, is the symbol in it.

(2) For each initially estimated symbol , a candidate set is created. contains lattice points close to .

(3) For each point , approximate marginalization is applied to the rest of the layers either via ZF or ZF-DFE. According to (17), a multiplication of and is needed for each which is updated proportionally to the size of and the symbol rate. However, note that

where is an vector, which can be precalculated at channel rate.

(4) Using back substitution [14], can be estimated from

(5) together with form a complete possible transmitted symbol vector which has an Euclidean distance

(6) In total, there will be different values for each layer, and there will be four layers each being the top layer once. Therefore, for a system, different values need to be computed. In case , there will be 64 different values which is 1/4 compared to the FCSO proposed in [4].

(7) For the sake of low complexity, instead of MAP detection, the following approximation can be used, so that

As presented in [5], the performance gap between MAP and MFCSO for MIMO using 64-QAM and 3/4 convolutional coding was proven to be small when (0.5 dB when FER= ). The gap increases to 2 dB when . On the other hand, the complexity of the detector when is already feasible for VLSI implementation.

As a simplification of the general MFCSO algorithm presented in Section 3.3, a MFCSO method for SM is elaborated in the following. Considering each complex-valued symbol as one layer, only one of them is exactly marginalized and the other is approximately marginalized (using DFE hard decision). The channel rate processing of MFCSO involves the QR decomposition (QRD) of two channel matrices which are in (3) and

The QRD generates an upper triangular matrix , and a unitary matrix according to (9).

The detection procedure for SM described in the following text is slightly different from the MFCSO presented in [5].

(1) Linear detection in (16) is carried out to estimate the initial symbol vector

Here is the transmitted symbol vector, within which, is the symbol.

(2) For each initially estimated symbol , , a candidate set is created. contains constellation points close to .

(3) First is chosen as the top-layer symbol. In order to perform DFE,

needs to be computed. The same operation is needed once again when is chosen as the top layer later.

(4) For the constellation point , its effect on will have to be canceled out.

Based on , the partial Euclidean distance

computed for the top-layer.

(5) DFE is applied to detect the other layer. Using back substitution [14], can be estimated from

(6) The estimated together with form a complete possible transmitted symbol vector , from which an accumulated full Euclidean distance

can be computed.

(7) In total, there will be different computed when is chosen as the top layer. Then is chosen as the top-layer symbol as well. Based on , and , the same procedure needs to be done once again to compute another different . Hence, for the system, different values need to be computed. They are used to update the LLR values in the end as described in [5].

The channel preprocessing is about the precalculation of equalization coefficient matrices from the estimated channel matrix . According to (15)), the computation involved in linear detection is mainly matrix manipulation including matrix multiplication and inversion. Here the matrix can be a complex-valued matrix of arbitrary size. As mentioned in [15], in practice, the size of is typically between and . Although larger matrices (e.g., ) can still be managed [15], the cost of real-time implementation will be much higher. For MFCSO, channel-rate processing includes the QR decomposition in (9). For MFCSO, aside from computing , QR decomposition is also needed according to (9).

The symbol-rate processing in soft-output linear detection [16] is to demap the equalized complex values to soft bits. In case of near-MAP detection methods such as MFCSO, layered processing is involved which requires substantially more computational effort. As described in Section 3.3, the symbol-rate processing in MFCSO involves the multiplication, subtraction, and computing the Euclidean distance based on estimated symbols.

The ChPU as depicted in Figure 5 handles channel-rate processing tasks such as computation of in (15) and the QR decomposition in (9). These are performed every time the estimated channel is updated. The computed coefficient matrices will be stored in the coefficient buffer and fed to the LLR demapper as input. As depicted in Figure 5, ChPU contains two Complex-valued Multiply-and-ACcumulate (CMAC), an inverse-square-root unit and a 32-bit register file containing 24 registers. The ChPU is a programmable unit controlled by microcode. The operations supported by the ChPU are listed in Table 1. The method presented in [16] has been used to compute , and the Modified Gram-Schmidt method [14] is used to compute and matrices in (9).

The DU computes the LLR values using the method presented in Section 3 and the Log-Max approximation in (20)

The DU consists of a number of processing elements (PE) as illustrated in Figure 6 which can utilize the parallelism in the MFCSO algorithm. The computed LLR values can be either directly passed to the channel decoder or combined with previously stored LLR values in the soft-buffer for H-ARQ. Since the processing in DU is at symbol rate which is much higher than the channel-rate processing in ChPU, a fully pipelined architecture is used in DU to allow the computation of 16 different in (27) to be finished within 16 clock cycles. DU is configured by a control register and can bypass the functions defined in Section 3 to only enable MMSE detection with soft output. The MMSE mode can be used in power saving mode to reduce the power consumption with a loss of detection performance. A 16-bit fixed-point datatype with proper scaling is adopted in DU, the output LLR values are quantized to be 6-bit signed integers. The number of PE in the DU is decided at design time according to the processing load and latency analysis. In this paper, it is chosen to be two based on the latency analysis in Section 9.3.

The MIMO detector itself does not contain memory except the small program memory. In order to store the temporarily computed , , , , and which are updated by the channel preprocessor at the channel rate, a coefficient buffer as depicted in Figure 4 is needed. The coefficient memory stores the above values for all data subcarriers (up to 20 MHz bandwidth for LTE and 10 MHz to WiMAX). The FIFO that stores the incoming data to the detector from the channel estimator and the subcarrier demapper is not shown in the figure, neither is the FIFO that passes the computed LLR values to the channel decoder hardware. Note that in case STBC is used, the number of data stored in memory can be reduced almost by half owing to the Alamouti features of , and no and matrices are needed.

Figure 7 shows the block error rate (BLER) of the LTE system with H-ARQ using different detection methods. The blue curves are the BLER of the first transmission while the red ones represent that of the first retransmission in H-ARQ. The figure shows that the BLER of the retransmission is drastically reduced compared to the first transmission which improves the throughput as shown later.

The result in Figures 8 and 9 shows that in case of 64-QAM and the weakest (rate ) channel coding defined in LTE is used, for SM, the FER performance of MAP is always better than that of MFCSO and -best. MFCSO achieves lower FER than the -best ( ) used in [10] until very high SNR. MMSE has the worst FER performance. Note that in wireless systems, throughput is a more important performance factor than BER or FER because it has a direct effect on the user experience. Figure 9 shows that the gain in throughput brought by MFCSO against MMSE is significant (up to 12.6 Mbits/s, or higher than the one achieved by MMSE). In comparison, the throughput performance degradation caused by the approximation in MFCSO is much smaller (up to 2.5 Mbits/s, or lower than that achieved by MAP). The much smaller gap in throughput in comparison to that of FER mainly owes to the H-ARQ retransmission with chase combining. The result shows that even with a sub optimal detector (with much lower complexity than the optimal detector) and almost no channel coding, a throughput that is close to the one achievable by MAP detectors can still be reached when H-ARQ is used. The throughput gain of MFCSO over the K-best is as significant as 5 Mbits/s ( ), when SNR is 26 dB.

Figures 10 and 11 show the BLER and throughput of SFBC with two different CQI values (9 and 15). The simulation shows that SFBC reaches at much lower SNR than SM as depicted in Table 2, though the throughput is half.

Figure 12 depicts the achievable throughput using two-level adaptive modulation and coding (AMC). The result shows that when SNR is worse than 10 dB, SFBC achieves both higher throughput and lower BLER than SM even if MAP detector is used.

The result in Figures 13 and 14 shows that when mild channel coding (e.g., RS-Conv 3/4) is used without H-ARQ in the WiMAX system, MFCSO still achieves near-MAP performance in FER and MAP performance in throughput. It has a gain of more than 9 dB compared to the MMSE detector. The use of stronger code (e.g. LDPC) will bring a gain of 4 dB in throughput compared to RS-Conv. This shows that MFCSO has a very promising performance/complexity trade-off taking the advance of channel coding into consideration. The result also shows that once FER reaches 0.01, any further improvement of FER gives only negligible increase in throughput.

In most of the literatures [1, 3, 5], perfect channel state information (CSI) is assumed which is never true in reality. In [4], channel estimation error is emulated with a randomly generated error constrained by the value of its average power, and the affected FER is plotted. However, how the channel estimation error affects the link-level performance of MIMO detection with the presence of H-ARQ has not been studied according to the best knowledge of the authors. In this paper, based on the least square (LS) channel estimation, the impact of channel estimation error on link-level performance is investigated, which provides a realistic measurement of the achievable performance of the MFCSO detector in a practical system. In this paper, an LTE system with (coding rate 0.8547, 64-QAM) and open-loop MIMO scheme is simulated using PedB channel. For comparison purposes, the MFCSO detector is benchmarked against the soft-output sphere decoding (SSD) in [1] and the MAP detector. However, note that no complexity reduction of SSD as used in [1] is applied in this paper, thus, the SSD performance reaches the upper bound. As depicted in Figure 15 and 16, regardless of the channel estimation error, SSD always achieves the same BLER and throughput performance as MAP detection. In Figure 15, the slope of the BLER curve of MFCSO will decrease when SNR reaches 28 dB. Considered from traditional point of view, the BLER performance of MFCSO is significantly worse than SSD and MAP (more than 2 dB). However, as shown in Figure 16, the throughput performance of MFCSO is only negligibly lower (0.3 dB) than that of SSD and MAP. This further proves that MFCSO has a better performance/complexity trade-off when taking system-level impact into consideration. Figure 16 also shows the throughput gap between the case assuming perfect CSI and the one with realistic LS estimated CSI is 1.5 dB in the active region for . In principle, channel estimation error will only cause the throughput curve to shift right by 1.5 dB.

Xilinx ISE and Core Generator were used to synthesize the design based on the Virtex2 xc2v6000 FPGA. The synthesis result is depicted in Table 5. The proposed implementation supports up to 64-QAM as described in Section 9.3. Table 5 shows that it consumes fewer slices and fewer embedded multipliers compared to the K-best detector presented in [10]. Note that the K-best FPGA implementation in [10] only supports the real-time detection of QPSK spatial multiplexing in LTE. The FPGA-based detector presented in [8] covers a different antenna configuration, and most importantly the Virtex-5 FPGA used has a different architecture from the Virtex-2 FPGAs, which makes it difficult to make an area comparison.

Table 6 depicts the gate count, and working frequency of the ASIC implementation. In reality, the channel coefficients are updated less frequently than the received symbols, thus, they are saved in the coefficient memory which is not counted in [10]. In order to compare the area consumed by memory and the detector itself, a demo chip including a 172800 bit coefficient memory and a 19200 bit data memory for 5 MHz bandwidth is implemented using Cadence backend flow. As depicted in Figure 17, the total area of the detector is with half of it consumed by the actual logic ( 0.2  ) of the detector and the other half by the memory. Note that the microcode memory is implemented as a piece of logic in the chip. The size of the memories depends on the number of subcarriers (or bandwidth) to be supported. The -best detector in [20] supports MIMO and 100 Mbps data rate. As mentioned in Section 3.3, the complexity of MFCSO is proportional to . Hence, the area of the detection part for will be four times of the presented solution. Compared to the figure of a -best detector for MIMO in 0.13- m running at 270 MHz (which is without memory in 65-nm according to CMOS scaling), the solution in this paper is without memory. Also note that [20] does not include the channel preprocessing part which is expected to give a major contribution in area (it already consumes half of the area of this solution).

Taking the assumption made in [10], for LTE system with 5 MHz bandwidth, there will be at most 300 data subcarriers to be processed within one OFDM symbol duration which is . This requires the detection of each data subcarrier to be finished within . For the FPGA implementation which has a clock frequency of 90 MHz, this amount of time is equal to around 25 clock cycles. Note that the detector can process two subcarriers in parallel which means each subcarrier can be finished within 16 cycles. For spatial multiplexing and 64-QAM (12 bits per subcarrier), this corresponds to Mbps processing throughput.

The ASIC implementation can easily run at a clock frequency of 300 MHz which means 1570 data subcarriers can be computed within . This corresponds to 225 Mbps processing throughput which allows real-time detection of 20 MHz bandwidth LTE downlink (containing up to 1200 data subcarriers) to be supported. Since the WiMAX 2004 [17] only uses 10 MHz bandwidth, it has a lower peak data rate than LTE, thus can be easily supported.

Note that the MFCSO detector can be switched to MMSE mode by poweringdown the major part of the DU. The detection in SFBC/STBC transmission schemes is in fact MMSE detection which can be handled by the MMSE mode. Since the MMSE mode will consume substantially less power than the MFCSO mode, the detector is switched to MMSE mode when the terminal enters power-saving mode.