6. Wafer-Level Packaging TSV/Stack Die for Integration of Analog and Power Solution

The development of the analog and power IC package is a dynamic technology. Both analog and power IC WLCSP applications that were unattainable only a few years ago are today commonplace thanks in part to advances in WLCSP electronic package design. From portable applications such as in mobile telecommunications to consumer electronics, each imposes its own individual demands on the development of WLCSP. To meet such a diverse range of application requirements, WLCSP range encompasses from pure analog application, power application, and system-on-chip (SOC) integration of analog, logic, mixed signal, and power device to system in package which includes individual analog, logic, and power devices, most of which are subdivided into a number of outline versions of wafer-level packaging. The analog and power WLCSP offers a high thermal dissipation enabling analog and power IC usage in some of the most demanding application areas which integrate analog, logic, and power mosfets with through-silicon via (TSV), stack die technology [1, 2]. This chapter will introduce the development of the advanced wafer-level packaging with TSV and stack die concepts for integration of analog and power solutions.