Skip to main content
Fachgebiete
Automobil + Motoren Bauwesen + Immobilien Business IT + Informatik Elektrotechnik + Elektronik Energie + Nachhaltigkeit Finance + Banking Management + Führung Marketing + Vertrieb Maschinenbau + Werkstoffe Versicherung + Risiko
DE
EN
Themenseiten
Organisationspsychologie Projektmanagement Marketing Smart Manufacturing
Bücher
Zeitschriften
Weitere Formate
Podcasts Webinare Technik Webinare Wirtschaft Kongresse Veranstaltungskalender Awards
Jetzt Einzelzugang starten
Zugang für Unternehmen
Referenzkunden
MTZ-Fachkongress

Antriebe und Energiesysteme von morgen


Austausch von Automobil- und Energiewirtschaft

Am 14./15. Mai geht es in Chemnitz um die Mobilitätswende durch Elektro- und Wasserstofffahrzeuge.
Erweiterte Suche
Anmelden
nach oben
Erschienen in:
An Interactive Smart Mirror Using Internet of Things and Machine Learning Kapitel lesen Erstes Kapitel lesen

2022 | OriginalPaper | Buchkapitel

8-Bit Carry Look Ahead Adder Using MGDI Technique

verfasst von : P. Ashok Babu, V. Siva Nagaraju, Rajeev Ratna Vallabhuni

Erschienen in: IoT and Analytics for Sensor Networks

Verlag: Springer Singapore

Einloggen

Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.

search-config
loading …

Abstract

High-performance and low power consumption are major factors that describe the significance of a design in VLSI. At low and ultra-low power applications, power consumption and logic delays are a fundamental problem. Nowadays, higher performance designs are built on the concept of computation units like ALU, where adders and multipliers are the essential components. To optimize low-power and high-performance applications, adders and multipliers need to be engineered to meet specifications such as speed and power dissipation. Using Modified Gate Diffusion Technique, this paper proposes a carry look-ahead adder (CLA). Compared with other adder models, the carry look ahead adder has much less propagation delay. The proposed adder is implemented on 90 nm technologies using the cadence environment. This paper's main objective is to use Modified Gate Diffusion Input (MGDI) Technology to develop and implement a CLA.

Sie haben noch keine Lizenz? Dann Informieren Sie sich jetzt über unsere Produkte:

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

  • über 102.000 Bücher
  • über 537 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Maschinenbau + Werkstoffe
  • Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Jetzt informieren

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 390 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Maschinenbau + Werkstoffe




 

Jetzt Wissensvorsprung sichern!

Jetzt informieren

Springer Professional "Wirtschaft"

Online-Abonnement

Mit Springer Professional "Wirtschaft" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 340 Zeitschriften

aus folgenden Fachgebieten:

  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Versicherung + Risiko




Jetzt Wissensvorsprung sichern!

Jetzt informieren
Vorheriges Kapitel An Ultra-Wide Band Patch Antenna for Commercial Communication Applications
Nächstes Kapitel Improved Scientific Workflow Scheduling Algorithm with Distributed Heft Ranking and TBW Scheduling Method
Literatur
1.
Manchala, S., & Vallabhuni, V. (2020). A unique approach to provide security for women by using smart device. European Journal of Molecular and Clinical Medicine, 7(1), 3669–3683.
2.
Siva, N.V., et al. (2020). Design and implementation of low power 32-bit comparator. In ICICNIS 2020, 10–11 Dec 2010 (pp. 1–8). Palai, India.
3.
Rani, B.M.S, et al. (2020). Retinal vascular disease detection from retinal fundus images using machine learning. Australia patent 2020101450.
4.
Venkateswarlu, S. C., et al. (2019). Implementation of area optimized low power multiplication and accumulation. International Journal of Innovative Technology and Exploring Engineering, 9(9), 2278–3075.
5.
Vallabhuni, R.R., et al. (2020). High speed energy efficient multiplier using 20nm FinFET technology. In Proceedings of the International Conference on IoT Based Control Networks and Intelligent Systems (ICICNIS 2020), 10–11 Dec 2020 (pp. 1–8). Palai, India.
6.
Rajeev, R.V., et al. (2020). Comparative validation of SRAM cells designed using 18nm FinFET for memory storing applications. In Proceedings of the 2nd International Conference on IoT, Social, Mobile, Analytics and Cloud in Computational Vision and Bio-Engineering (pp. 1–10).
7.
Vallabhuni, V., & Avireni, S. (2019). A low power waveform generator using DCCII with grounded capacitor. International Journal of Public Sector Performance Management, 5, 134–145.CrossRef
8.
Vallabhuni, V., et al. (2019). System and method to improve performance of amplifiers using bias current. The Patent Office Journal No. 43/2019, India. International classification: C12Q1/6869. Application No. 201941042648 A.
9.
Babu, P.A., et al. (2021). Realization of 8 × 4 barrel shifter with 4-bit binary to gray converter using FinFET for low power digital applications. Journal of Physics: Conference Series, 1714(1). IOP Publishing.
10.
Rajeev, R.V., et al. (2020). An advanced computing architecture for binary to thermometer decoder using 18nm FinFET. In 2020 Third International Conference Smart Systems and Inventive Technology (ICSSIT), 20–22 Aug 2020 (pp. 510–515). Tirunelveli, India.
11.
Vallabhuni, V., et al. (2019). A simple and enhanced low-light image enhancement process using effective illumination mapping approach. Lecture Notes in Computational Vision and Biomechanics, Cham, Switzerland (pp. 975–984).
12.
Vallabhuni, V. (2017). Second generation differential current conveyor (DCCII) and its applications. Vignan's Foun. Sci., Tech. & Res. (Deemed to be University).
13.
Rajeev, R.V., et al. (2020). Performance analysis: D-Latch modules designed using 18nm FinFET Technology. In 2020 International Conference on Smart Electronics and Communication (ICOSEC), September 10–12 (pp. 1171–1176). Tholurpatti, India.
14.
Vallabhuni, V., & Avireni, S. (2017). A novel square wave generator using second generation differential current conveyor. Arabian Journal for Science and Engineering, 42(12), 4983–4990.CrossRef
15.
Vijay, V., et al. (2012). Performance evaluation of the CMOS full adders in TDK 90 nm technology. International Journal of Systems, Algorithms and Applications, 2(1), 711.
16.
Vallabhuni, V., et al. (2020). High performance 2:1, 4:1 and 8:1 binary and ternary multiplexer realization using CNTFET technology. Journal of Critical Reviews, 7(6), 1159–1163.
17.
18.
Rajeev, R.V., et al. (2021). Universal shift register designed at low supply voltages in 20nm FinFET using multiplexer. Lecture Notes in Networks and Systems.
19.
20.
Saritha, P., et al. (2020). 4-Bit Vedic multiplier with 18nm FinFET technology. In 2020 International conference on Electronics and Sustainable Communication Systems (ICESC) (pp. 1079–1084). Coimbatore, India.
21.
Vijay, V., et al. (2012). A review of the 0.09 µm standard full adders. International Journal of VLSI Design & Communication Systems, 3(3), 119.
22.
Shaker, P.C., et al. (2020). Realization and comparative analysis of thermometer code based 4-bit encoder using 18 nm FinFET technology for analog to digital converters. Advanced Intelligent Systems and Computing (AISC).
23.
Mohammad, K., et al. (2020). Design of carry select adder based on a compact carry look ahead unit using 18 nm FinFET technology. Journal of Critical Reviews, 7(6), 1164–1171.
24.
Rajeev, R.V., et al. (2020). Design of comparator using 18 nm FinFET technology for analog to digital converters. In 2020 7th International Conference on Smart Structures and Systems (ICSSS) 23–24 July 2020 (pp. 318–323). Chennai, India.
25.
Rajeev, R.V., et al. (2020). Smart cart shopping system with an RFID interface for human assistance. In 2020 3rd International Conference on Intelligent Sustainable Systems (ICISS), 4–5 Dec 2020 (pp. 165–169). Palladam, India.
26.
Vallabhuni, V., et al. (2019). System for minimizing crosstalk effects of shells and designing multiwalled carbon nanotube models. The Patent Office Journal No. 43/2019, India. Int. classification: B82Y10/00. Application No. 201941042460 A.
27.
Rajeev, R.V., et al. (2020). Comparative analysis of 8-bit manchester carry chain adder using FinFET at 18 nm technology. In 2020 3rd International Conference Intelligent Sustainability Systems (ICISS), 4–5 Dec 2020 (pp. 1579–1583). Palladam, India.
28.
Rajeev R.V., et al. (2020). Transistor SRAM cell designed using 18 nm FinFET technology. In 2020 3rd International Conference Intelligent Sustainability System (pp. 1584–1589). Palladam, India.
Metadaten
Titel
8-Bit Carry Look Ahead Adder Using MGDI Technique
verfasst von
P. Ashok Babu
V. Siva Nagaraju
Rajeev Ratna Vallabhuni
Copyright-Jahr
2022
Verlag
Springer Singapore
Buch
IoT and Analytics for Sensor Networks

Print ISBN: 978-981-16-2918-1

Electronic ISBN: 978-981-16-2919-8

Copyright-Jahr: 2022

DOI
https://doi.org/10.1007/978-981-16-2919-8_22

Neuer Inhalt

    Bildnachweise