A Calibration Technique for Current Steering DACs - Self Calibration with Capacitor Storage

High resolution DACs require large transistors to obtain the desired accuracy according to the Pelgrom model [1], which increases the area drastically. To overcome this area accuracy trade off, several calibration techniques were investigated. This paper presents a modified self calibration technique for current-steering (CS) digital-to-analog converters (DACs). In the digital calibration technique calibrating DACs (CALDACs) are connected across each bit, which requires calibration. High resolution CALDAC increases the accuracy at a cost of increment in the area. To overcome this problem, this technique is slightly modified. Instead of using CALDAC of 6 or 8 bits across each bit, here a single CALDAC is used to calibrate each bit, and its equivalent calibrated value in terms of analog voltage is stored across the capacitor (instead of within SRAM memory in digital form), which is connected in the place of CALDAC by using an extra-auxiliary transistor. MOSFET as a switch is used for simultaneous switching and to hold the correct voltage after turning off switches, injection nulling switch type track and hold circuit is used. To demonstrate this technique, a 10-bit binary-weighted CS DAC is implemented in a 0.18 \(\upmu \)m CMOS process. With worst-case process parameter variations, simulated integral and differential nonlinearities of the calibrated DAC are less than 0.32 LSB.