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2019 | OriginalPaper | Buchkapitel

Accelerating Online Change-Point Detection Algorithm Using 10 GbE FPGA NIC

verfasst von : Takuma Iwata, Kohei Nakamura, Yuta Tokusashi, Hiroki Matsutani

Erschienen in: Euro-Par 2018: Parallel Processing Workshops

Verlag: Springer International Publishing

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Abstract

In statistical analysis and data mining, change-point detection that identifies the change-points which are times when the probability distribution of time series changes has been used for various purposes, such as anomaly detections on network traffic and transaction data. However, computation cost of a conventional AR (Auto-Regression) model based approach is too high and infeasible for online. In this paper, an AR model based online change-point detection algorithm, called ChangeFinder, is implemented on an FPGA (Field Programmable Gate Array) based NIC (Network Interface Card). The proposed system computes the change-point score from time series data received from 10 GbE (10 Gbit Ethernet). More specifically, it computes the change-point score at the 10 GbE NIC in advance of host applications. This paper aims to reduce the host workload and improve change-point detection performance by offloading ChangeFinder algorithm from host to the NIC. As evaluations, change-point detection in the FPGA NIC is compared with a baseline software implementation and those enhanced by two network optimization techniques using DPDK and Netfilter in terms of throughput. The result demonstrates 16.8x improvement in change-point detection throughput compared to the baseline software implementation. The throughput achieves 83.4% of the 10 GbE line rate.

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Fußnoten
1
In addition to the packet length, Ethernet preamble, FCS, and IFG are also considered.
 
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Metadaten
Titel
Accelerating Online Change-Point Detection Algorithm Using 10 GbE FPGA NIC
verfasst von
Takuma Iwata
Kohei Nakamura
Yuta Tokusashi
Hiroki Matsutani
Copyright-Jahr
2019
DOI
https://doi.org/10.1007/978-3-030-10549-5_40

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