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1986 | OriginalPaper | Buchkapitel

Developing an RSA Chip

verfasst von : Martin Kochanski

Erschienen in: Advances in Cryptology — CRYPTO ’85 Proceedings

Verlag: Springer Berlin Heidelberg

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FAF’4 is a fast arithmetic processor designed specifically for modular operations, including exponentiation, on large integers. It is at present implemented as an array of 32-bit bit-slice processors, which may be interconnected without additional circuitry to obtain word lengths of up to 1023 bits. With 512-bit operands, exponentiation takes 133 milliseconds at worst (100 ms typically).

Metadaten
Titel
Developing an RSA Chip
verfasst von
Martin Kochanski
Copyright-Jahr
1986
Verlag
Springer Berlin Heidelberg
DOI
https://doi.org/10.1007/3-540-39799-X_25