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Erschienen in:
2005 | OriginalPaper | Buchkapitel
Efficient AES Implementations on ASICs and FPGAs
verfasst von : Norbert Pramstaller, Stefan Mangard, Sandra Dominikus, Johannes Wolkerstorfer
Erschienen in: Advanced Encryption Standard – AES
Verlag: Springer Berlin Heidelberg
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In this article, we present two AES hardware architectures: one for ASICs and one for FPGAs. Both architectures utilize the similarities of encryption and decryption to provide a high throughput using only a relatively small area. The presented architectures can be used in a wide range of applications. The architecture for ASIC implementations is suited for full-custom as well as for semi-custom design flows. The architecture for the FPGA implementation does not require on-chip block RAMs and can therefore even be used for low-cost FPGAs.