Skip to main content

2016 | OriginalPaper | Buchkapitel

Extreme Pipelining Towards the Best Area-Performance Trade-Off in Hardware

verfasst von : Stjepan Picek, Dominik Sisejkovic, Domagoj Jakobovic, Lejla Batina, Bohan Yang, Danilo Sijacic, Nele Mentens

Erschienen in: Progress in Cryptology – AFRICACRYPT 2016

Verlag: Springer International Publishing

Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.

search-config
loading …

Abstract

This paper presents a novel framework for the automatic pipelining of AES S-boxes using composite field representations. The framework is capable of finding positions to insert flip-flops in an almost optimal way, resulting in S-boxes with an almost optimal critical path. Our novel method is using memetic algorithms and is shown to be fast, reliable and successful. We demonstrate our framework for composite field S-boxes using a polynomial and a normal basis, respectively. Our results prove that this method should be consulted when an optimal solution is of interest. Besides experimental results with the new memetic algorithms, we also discuss the ideal model of a circuit, which can be used when assessing the quality of the obtained solutions. We emphasize that this method can be used for any circuit of interest and not only for AES S-boxes.

Sie haben noch keine Lizenz? Dann Informieren Sie sich jetzt über unsere Produkte:

Springer Professional "Wirtschaft+Technik"

Online-Abonnement

Mit Springer Professional "Wirtschaft+Technik" erhalten Sie Zugriff auf:

  • über 102.000 Bücher
  • über 537 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Maschinenbau + Werkstoffe
  • Versicherung + Risiko

Jetzt Wissensvorsprung sichern!

Springer Professional "Technik"

Online-Abonnement

Mit Springer Professional "Technik" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 390 Zeitschriften

aus folgenden Fachgebieten:

  • Automobil + Motoren
  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Elektrotechnik + Elektronik
  • Energie + Nachhaltigkeit
  • Maschinenbau + Werkstoffe




 

Jetzt Wissensvorsprung sichern!

Springer Professional "Wirtschaft"

Online-Abonnement

Mit Springer Professional "Wirtschaft" erhalten Sie Zugriff auf:

  • über 67.000 Bücher
  • über 340 Zeitschriften

aus folgenden Fachgebieten:

  • Bauwesen + Immobilien
  • Business IT + Informatik
  • Finance + Banking
  • Management + Führung
  • Marketing + Vertrieb
  • Versicherung + Risiko




Jetzt Wissensvorsprung sichern!

Anhänge
Nur mit Berechtigung zugänglich
Literatur
1.
Zurück zum Zitat Batina, L., Jakobovic, D., Mentens, N., Picek, S., Piedra, A.D.L., Sisejkovic, D.: S-box pipelining using genetic algorithms for high-throughput AES implementations: how fast can we go?. In: Proceedings of the Progress in Cryptology - INDOCRYpPT 2014–15th International Conference on Cryptology in India, New Delhi, India, December 14–17, 2014, pp. 322–337 (2014) Batina, L., Jakobovic, D., Mentens, N., Picek, S., Piedra, A.D.L., Sisejkovic, D.: S-box pipelining using genetic algorithms for high-throughput AES implementations: how fast can we go?. In: Proceedings of the Progress in Cryptology - INDOCRYpPT 2014–15th International Conference on Cryptology in India, New Delhi, India, December 14–17, 2014, pp. 322–337 (2014)
3.
Zurück zum Zitat Shenoy, N., Rudell, R.: Efficient implementation of retiming. In: Kuehlmann, A. (ed.) The Best of ICCAD, pp. 615–630. Springer, New York (2003)CrossRef Shenoy, N., Rudell, R.: Efficient implementation of retiming. In: Kuehlmann, A. (ed.) The Best of ICCAD, pp. 615–630. Springer, New York (2003)CrossRef
4.
Zurück zum Zitat Lin, M.B.: Introduction to VLSI Systems: A Logic, Circuit, and System Perspective. CRC Press, Boca Raton (2011) Lin, M.B.: Introduction to VLSI Systems: A Logic, Circuit, and System Perspective. CRC Press, Boca Raton (2011)
5.
Zurück zum Zitat Tillich, S., Feldhofer, M., Großschädl, J.: Area, delay, and power characteristics of standard-cell implementations of the AES S-box. In: Vassiliadis, S., Wong, S., Hämäläinen, T.D. (eds.) SAMOS 2006. LNCS, vol. 4017, pp. 457–466. Springer, Heidelberg (2006)CrossRef Tillich, S., Feldhofer, M., Großschädl, J.: Area, delay, and power characteristics of standard-cell implementations of the AES S-box. In: Vassiliadis, S., Wong, S., Hämäläinen, T.D. (eds.) SAMOS 2006. LNCS, vol. 4017, pp. 457–466. Springer, Heidelberg (2006)CrossRef
6.
Zurück zum Zitat Corp., F.T.: Faraday Cell Library 0.13 \(\mu \)m Standard Cell (2004) Corp., F.T.: Faraday Cell Library 0.13 \(\mu \)m Standard Cell (2004)
7.
Zurück zum Zitat Daemen, J., Rijmen, V.: The Design of Rijndael. Springer-Verlag New York Inc, Secaucus (2002)CrossRefMATH Daemen, J., Rijmen, V.: The Design of Rijndael. Springer-Verlag New York Inc, Secaucus (2002)CrossRefMATH
8.
Zurück zum Zitat Morioka, S., Satoh, A.: A 10 GBPS full-aes crypto design with a twisted-BDD S-box architecture. In: Proceedings of 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors, pp. 98–103(2002) Morioka, S., Satoh, A.: A 10 GBPS full-aes crypto design with a twisted-BDD S-box architecture. In: Proceedings of 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors, pp. 98–103(2002)
9.
Zurück zum Zitat Satoh, A., Morioka, S., Takano, K., Munetoh, S.: A compact rijndael hardware architecture with S-box optimization. In: Boyd, C. (ed.) ASIACRYPT 2001. LNCS, vol. 2248, pp. 239–254. Springer, Heidelberg (2001)CrossRef Satoh, A., Morioka, S., Takano, K., Munetoh, S.: A compact rijndael hardware architecture with S-box optimization. In: Boyd, C. (ed.) ASIACRYPT 2001. LNCS, vol. 2248, pp. 239–254. Springer, Heidelberg (2001)CrossRef
10.
Zurück zum Zitat Morioka, S., Satoh, A.: An optimized S-box circuit architecture for low power aes design. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 172–186. Springer, Heidelberg (2003)CrossRef Morioka, S., Satoh, A.: An optimized S-box circuit architecture for low power aes design. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 172–186. Springer, Heidelberg (2003)CrossRef
11.
Zurück zum Zitat Rijmen, V.: Efficient Implementation of the Rijndael S-box Rijmen, V.: Efficient Implementation of the Rijndael S-box
12.
Zurück zum Zitat Canright, D.: A very compact S-box for AES. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 441–455. Springer, Heidelberg (2005)CrossRef Canright, D.: A very compact S-box for AES. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 441–455. Springer, Heidelberg (2005)CrossRef
13.
Zurück zum Zitat Mentens, N., Batina, L., Preneel, B., Verbauwhede, I.: A systematic evaluation of compact hardware implementations for the rijndael S-box. In: Menezes, A. (ed.) CT-RSA 2005. LNCS, vol. 3376, pp. 323–333. Springer, Heidelberg (2005)CrossRef Mentens, N., Batina, L., Preneel, B., Verbauwhede, I.: A systematic evaluation of compact hardware implementations for the rijndael S-box. In: Menezes, A. (ed.) CT-RSA 2005. LNCS, vol. 3376, pp. 323–333. Springer, Heidelberg (2005)CrossRef
14.
Zurück zum Zitat Paar, C.: Efficient VLSI architectures for bit parallel computation in Galios [Galois] fields. VDI-Verlag (1994) Paar, C.: Efficient VLSI architectures for bit parallel computation in Galios [Galois] fields. VDI-Verlag (1994)
15.
Zurück zum Zitat Maheshwari, N., Sapatnekar, S.: Efficient retiming of large circuits. IEEE Trans. Very Large Scale Integr. VLSI Syst. 6(1), 74–83 (1998)CrossRef Maheshwari, N., Sapatnekar, S.: Efficient retiming of large circuits. IEEE Trans. Very Large Scale Integr. VLSI Syst. 6(1), 74–83 (1998)CrossRef
16.
Zurück zum Zitat Münzer, A., Hemme, G.: Converting combinational circuits into pipelined data paths. In: 1991 IEEE International Conference on Computer-Aided Design, ICCAD 1991, Digest of Technical Papers, pp. 368–371, November 1991 Münzer, A., Hemme, G.: Converting combinational circuits into pipelined data paths. In: 1991 IEEE International Conference on Computer-Aided Design, ICCAD 1991, Digest of Technical Papers, pp. 368–371, November 1991
17.
Zurück zum Zitat Jiang, J.H., Brayton, R.: Retiming and resynthesis: a complexity perspective. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12), 2674–2686 (2006)CrossRef Jiang, J.H., Brayton, R.: Retiming and resynthesis: a complexity perspective. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12), 2674–2686 (2006)CrossRef
18.
Zurück zum Zitat Wolkerstorfer, J., Oswald, E., Lamberger, M.: An ASIC implementation of the AES SBoxes. In: Preneel, B. (ed.) CT-RSA 2002. LNCS, vol. 2271, pp. 67–78. Springer, Heidelberg (2002)CrossRef Wolkerstorfer, J., Oswald, E., Lamberger, M.: An ASIC implementation of the AES SBoxes. In: Preneel, B. (ed.) CT-RSA 2002. LNCS, vol. 2271, pp. 67–78. Springer, Heidelberg (2002)CrossRef
19.
Zurück zum Zitat Moradi, A., Poschmann, A., Ling, S., Paar, C., Wang, H.: Pushing the limits: a very compact and a threshold implementation of AES. In: Paterson, K.G. (ed.) EUROCRYPT 2011. LNCS, vol. 6632, pp. 69–88. Springer, Heidelberg (2011)CrossRef Moradi, A., Poschmann, A., Ling, S., Paar, C., Wang, H.: Pushing the limits: a very compact and a threshold implementation of AES. In: Paterson, K.G. (ed.) EUROCRYPT 2011. LNCS, vol. 6632, pp. 69–88. Springer, Heidelberg (2011)CrossRef
20.
Zurück zum Zitat Bertoni, G., Breveglieri, L., Fragneto, P., Macchetti, M., Marchesin, S.: Efficient software implementation of AES on 32-bit platforms. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 159–171. Springer, Heidelberg (2003)CrossRef Bertoni, G., Breveglieri, L., Fragneto, P., Macchetti, M., Marchesin, S.: Efficient software implementation of AES on 32-bit platforms. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 159–171. Springer, Heidelberg (2003)CrossRef
21.
Zurück zum Zitat Hodjat, A., Verbauwhede, I.: Area-throughput trade-offs for fully pipelined 30 to 70 gbits/s AES processors. IEEE Trans. Comput. 55(4), 366–372 (2006)CrossRef Hodjat, A., Verbauwhede, I.: Area-throughput trade-offs for fully pipelined 30 to 70 gbits/s AES processors. IEEE Trans. Comput. 55(4), 366–372 (2006)CrossRef
22.
Zurück zum Zitat Hodjat, A., Verbauwhede, I.: A 21.54 Gbits/s fully pipelined AES processor on FPGA. In: 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004, pp. 308–309, April 2004 Hodjat, A., Verbauwhede, I.: A 21.54 Gbits/s fully pipelined AES processor on FPGA. In: 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2004, pp. 308–309, April 2004
23.
Zurück zum Zitat Boyar, J., Peralta, R.: A small depth-16 circuit for the AES S-box. In: Gritzalis, D., Furnell, S., Theoharidou, M. (eds.) SEC 2012. IFIP AICT, vol. 376, pp. 287–298. Springer, Heidelberg (2012)CrossRef Boyar, J., Peralta, R.: A small depth-16 circuit for the AES S-box. In: Gritzalis, D., Furnell, S., Theoharidou, M. (eds.) SEC 2012. IFIP AICT, vol. 376, pp. 287–298. Springer, Heidelberg (2012)CrossRef
24.
Zurück zum Zitat Boyar, J., Peralta, R.: A new combinational logic minimization technique with applications to cryptology. In: Festa, P. (ed.) SEA 2010. LNCS, vol. 6049, pp. 178–189. Springer, Heidelberg (2010)CrossRef Boyar, J., Peralta, R.: A new combinational logic minimization technique with applications to cryptology. In: Festa, P. (ed.) SEA 2010. LNCS, vol. 6049, pp. 178–189. Springer, Heidelberg (2010)CrossRef
25.
Zurück zum Zitat Clark, J.A., Jacob, J.L., Stepney, S., Maitra, S., Millan, W.L.: Evolving boolean functions satisfying multiple criteria. In: Menezes, A., Sarkar, P. (eds.) INDOCRYPT 2002. LNCS, vol. 2551, pp. 246–259. Springer, Heidelberg (2002)CrossRef Clark, J.A., Jacob, J.L., Stepney, S., Maitra, S., Millan, W.L.: Evolving boolean functions satisfying multiple criteria. In: Menezes, A., Sarkar, P. (eds.) INDOCRYPT 2002. LNCS, vol. 2551, pp. 246–259. Springer, Heidelberg (2002)CrossRef
26.
Zurück zum Zitat Burnett, L., Carter, G., Dawson, E., Millan, W.L.: Efficient methods for generating MARS-like S-boxes. In: Schneier, B. (ed.) FSE 2000. LNCS, vol. 1978, pp. 300–314. Springer, Heidelberg (2001)CrossRef Burnett, L., Carter, G., Dawson, E., Millan, W.L.: Efficient methods for generating MARS-like S-boxes. In: Schneier, B. (ed.) FSE 2000. LNCS, vol. 1978, pp. 300–314. Springer, Heidelberg (2001)CrossRef
27.
Zurück zum Zitat Picek, S., Papagiannopoulos, K., Ege, B., Batina, L., Jakobovic, D.: Confused by confusion: systematic evaluation of DPA resistance of various S-boxes. In: Proceedings of Progress in Cryptology - INDOCRYpPT 2014–15th International Conference on Cryptology in India, New Delhi, India, December 14–17, pp. 374–390 (2014) Picek, S., Papagiannopoulos, K., Ege, B., Batina, L., Jakobovic, D.: Confused by confusion: systematic evaluation of DPA resistance of various S-boxes. In: Proceedings of Progress in Cryptology - INDOCRYpPT 2014–15th International Conference on Cryptology in India, New Delhi, India, December 14–17, pp. 374–390 (2014)
28.
Zurück zum Zitat Yagain, D., Vijayakrishna, A.: A novel framework for retiming using evolutionary computation for high level synthesis of digital filters. Swarm Evol. Comput. 20, 37–47 (2015)CrossRef Yagain, D., Vijayakrishna, A.: A novel framework for retiming using evolutionary computation for high level synthesis of digital filters. Swarm Evol. Comput. 20, 37–47 (2015)CrossRef
30.
Zurück zum Zitat Talbi, E.G.: Metaheuristics: From Design to Implementation. Wiley Publishing, Hoboken (2009)CrossRefMATH Talbi, E.G.: Metaheuristics: From Design to Implementation. Wiley Publishing, Hoboken (2009)CrossRefMATH
31.
Zurück zum Zitat Eiben, A.E., Smith, J.E.: Introduction to Evolutionary Computing. Springer-Verlag, Heidelberg (2003)CrossRefMATH Eiben, A.E., Smith, J.E.: Introduction to Evolutionary Computing. Springer-Verlag, Heidelberg (2003)CrossRefMATH
32.
33.
Zurück zum Zitat Yao, X.: Optimization by genetic annealing. In: Proceedings of 2nd Australian Conference on Neural Networks, pp. 94–97 (1991) Yao, X.: Optimization by genetic annealing. In: Proceedings of 2nd Australian Conference on Neural Networks, pp. 94–97 (1991)
34.
Zurück zum Zitat Glover, F.W., Kochenberger, G.A. (eds.): Handbook of Metaheuristics. International Series in Operations Research & Management Science, vol. 114, 1st edn. Springer, Heideelberg (2003)MATH Glover, F.W., Kochenberger, G.A. (eds.): Handbook of Metaheuristics. International Series in Operations Research & Management Science, vol. 114, 1st edn. Springer, Heideelberg (2003)MATH
35.
Zurück zum Zitat Standaert, F.-X., Rouvroy, G., Quisquater, J.-J., Legat, J.-D.: Efficient implementation of rijndael encryption in reconfigurable hardware: improvements and design tradeoffs. In: Walter, C.D., Koç, Ç.K., Paar, C. (eds.) CHES 2003. LNCS, vol. 2779, pp. 334–350. Springer, Heidelberg (2003)CrossRef Standaert, F.-X., Rouvroy, G., Quisquater, J.-J., Legat, J.-D.: Efficient implementation of rijndael encryption in reconfigurable hardware: improvements and design tradeoffs. In: Walter, C.D., Koç, Ç.K., Paar, C. (eds.) CHES 2003. LNCS, vol. 2779, pp. 334–350. Springer, Heidelberg (2003)CrossRef
36.
Zurück zum Zitat Kerckhof, S., Durvaux, F., Hocquet, C., Bol, D., Standaert, F.-X.: Towards green cryptography: a comparison of lightweight ciphers from the energy viewpoint. In: Prouff, E., Schaumont, P. (eds.) CHES 2012. LNCS, vol. 7428, pp. 390–407. Springer, Heidelberg (2012)CrossRef Kerckhof, S., Durvaux, F., Hocquet, C., Bol, D., Standaert, F.-X.: Towards green cryptography: a comparison of lightweight ciphers from the energy viewpoint. In: Prouff, E., Schaumont, P. (eds.) CHES 2012. LNCS, vol. 7428, pp. 390–407. Springer, Heidelberg (2012)CrossRef
Metadaten
Titel
Extreme Pipelining Towards the Best Area-Performance Trade-Off in Hardware
verfasst von
Stjepan Picek
Dominik Sisejkovic
Domagoj Jakobovic
Lejla Batina
Bohan Yang
Danilo Sijacic
Nele Mentens
Copyright-Jahr
2016
DOI
https://doi.org/10.1007/978-3-319-31517-1_8

Premium Partner