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Erschienen in:
1987 | OriginalPaper | Buchkapitel
Fault Tolerant VLSI Multicomputers
verfasst von : Carlo H. Séquin, Yuval Tamir
Erschienen in: VLSI CAD Tools and Applications
Verlag: Springer US
Enthalten in: Professional Book Archive
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An approach is presented to increasing the reliability of future high-end systems beyond what is possible with technological solutions alone. The system consists of computation nodes and communication nodes, interconnected by high-speed dedicated links. These components are relied upon to detect errors while system level protocols are used for error recovery and reconfiguration. The use of duplication and matching for implementing the self-checking nodes allows us to restrict a detailed analysis of the impact of all possible faults to the comparator, a circuit that can be implemented in a relatively straight-forward way in NMOS or CMOS technology.