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2012 | OriginalPaper | Buchkapitel

2. Functional Analysis and Synthesis of Binary and Decimal Adding and Subtracting Devices

verfasst von : Mircea Vlăduţiu

Erschienen in: Computer Arithmetic

Verlag: Springer Berlin Heidelberg

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Abstract

Following a brief presentation of the serial adder, the chapter approaches at large the problems of functional analysis and synthesis of the parallel addition and subtraction devices for binary and decimal numbers. The advantages and disadvantages of the parallel adders and subtracters based on the ripple carry principle are discussed both for binary numbers as well as for decimal numbers. Afterwards solutions for improving the performance with respect to the critical parameter represented by the maximal addition time are analyzed, based on the carry lookahead, carry-skip, carry-select and conditional-sum principles. Distinct sections are allocated to the parallel adders based on the carry save principle allowing for the synthesis of efficient multiplication devices, respectively to the parity checked adders allowing for the enhancement of reliability and dependability.

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Metadaten
Titel
Functional Analysis and Synthesis of Binary and Decimal Adding and Subtracting Devices
verfasst von
Mircea Vlăduţiu
Copyright-Jahr
2012
Verlag
Springer Berlin Heidelberg
DOI
https://doi.org/10.1007/978-3-642-18315-7_2

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