2000 | OriginalPaper | Buchkapitel
Instruction Scheduling for Clustered VLIW Processors
verfasst von : Dr. Rainer Leupers
Erschienen in: Code Optimization Techniques for Embedded Processors
Verlag: Springer US
Enthalten in: Professional Book Archive
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This chapter presents a code optimization technique for a special class of processor data paths, which we call clustered VLIW. Here, a cluster denotes a piece of the data path with functional units (FUs) and a local register file. Such a data path architecture is frequently found in multimedia processors and ASIPs. We will focus on the problem of instruction scheduling. Fig. 4.1 shows how this phase relates to the overall compilation flow.