2015 | OriginalPaper | Buchkapitel
Architecture Virtualization for Run-Time Hardware Multithreading on Field Programmable Gate Arrays
verfasst von : Michael Metzner, Jesus A. Lizarraga, Christophe Bobda
Erschienen in: Applied Reconfigurable Computing
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In this paper a novel coarse-grained architecture virtualization for Field Programmable Gate Arrays (FPGA) is presented which can be used as basis for run-time dynamic hardware multithreading. The architecture uses on-chip networking to interconnect routers and computational elements providing a flexible and highly configurable structure. Quadratic routers are reducing total router count while ensuring short communication paths and minimal resource overhead.