2017 | OriginalPaper | Buchkapitel
On the Untapped Potential of Encoding Predicates by Arithmetic Circuits and Their Applications
verfasst von : Shuichi Katsumata
Erschienen in: Advances in Cryptology – ASIACRYPT 2017
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Abstract
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We propose two VRFs on bilinear maps. Both of our schemes are secure under a non-interactive Q-type assumption where Q is only poly-logarithmic in the security parameter, and they achieve either a poly-logarithmic verification key size or proof size. This is a significant improvement over prior works, where all previous schemes either require a strong hardness assumption or a large verification key and proof size.
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We propose a lattice-based PE scheme for the class of multi-dimensional equality (\(\mathsf {MultD}\text {-}\mathsf {Eq}\)) predicates. This class of predicate is expressive enough to capture many of the appealing applications that motivates PE schemes. Our scheme achieves the best in terms of the required approximation factor for LWE (we only require \(\mathsf {poly}(\lambda )\)) and the decryption time. In particular, all existing PE schemes that support the class of \(\mathsf {MultD}\text {-}\mathsf {Eq}\) predicates either require a subexponential LWE assumption or an exponential decryption time (in the dimension of the \(\mathsf {MultD}\text {-}\mathsf {Eq}\) predicates).