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Erschienen in:
2011 | OriginalPaper | Buchkapitel
Verifying Fence Elimination Optimisations
verfasst von : Viktor Vafeiadis, Francesco Zappa Nardelli
Erschienen in: Static Analysis
Verlag: Springer Berlin Heidelberg
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We consider simple compiler optimisations for removing redundant memory fences in programs running on top of the x86-TSO relaxed memory model. While the optimisations are performed using standard thread-local control flow analyses, their correctness is subtle and relies on a non-standard global simulation argument. The implementation and the proof of correctness are programmed in Coq as part of CompCertTSO, a fully-fledged certified compiler from a concurrent extension of a C-like language to x86 assembler. In this article, we describe the soundness proof of the optimisations and evaluate their effectiveness.