Low Power Distributed Embedded Systems: Dynamic Voltage Scaling and Synthesis

In this paper, we survey multi-objective system synthesis algorithms for lowp ower real-time systems-on-a-chip (SOCs), distributed and wireless client-server embedded systems, distributed embedded systems with recon.gurable.eld-programmable gate arrays (FPGAs), as well as distributed systems of SOCs. Many of these synthesis algorithms target simultaneous optimization of di.erent cost objectives, including system price, area and power consumption. Dynamic voltage scaling has proved to be a powerful technique for reducing power consumption. We also survey several dynamic voltage scaling techniques for distributed embedded systems containing voltage-scalable processors. The dynamic voltage scaling algorithms can be embedded in the inner-loop of a system synthesis framework and provide feedback for system-level design space exploration. Besides voltage-scalable processors, dynamically voltagescalable links have also been proposed for implementing high performance and low power interconnection networks for distributed systems. We survey relevant techniques in this area as well.