Skip to main content
Erschienen in: Automatic Control and Computer Sciences 4/2020

01.07.2020

Real-Time Task Schedulers for a High-Performance Multi-Core System

verfasst von: M. Lordwin Cecil Prabhaker, R. Saravana Ram

Erschienen in: Automatic Control and Computer Sciences | Ausgabe 4/2020

Einloggen, um Zugang zu erhalten

Aktivieren Sie unsere intelligente Suche, um passende Fachinhalte oder Patente zu finden.

search-config
loading …

Abstract

This paper proposes a multi-objective task scheduling algorithm for high performance real-time computing systems designed by the Multicore processor. Most real-time systems are battery powered and operate many complex mechanisms. In such a system, it is necessary to consider the energy consumption, core/processor utilization and deadlock miss rate to improve performance. In order to achieve high efficiency and low power consumption, a multi-objective real-time task scheduler is proposed considering voltage transaction delay, core utilization, unused cores and static and dynamic connection power. Single Objective Genetic Algorithm (GA) and Cellular GA (CGA) are implemented to compare the results with existing methods. The simulation results show that our approach improves performance relatively. Core utilisation is increases from about 5 to 7%. Moreover, the average power consumption decrease is about 12% compared to the existing proposed planners.
Literatur
1.
Zurück zum Zitat Da He and Mueller, W., Heuristic energy-aware approach for hard real-time systems on multi-core platforms, J. Microprocess. Microsyst., 2013, vol. 37, no. 8, part A, pp. 858–870. Da He and Mueller, W., Heuristic energy-aware approach for hard real-time systems on multi-core platforms, J. Microprocess. Microsyst., 2013, vol. 37, no. 8, part A, pp. 858–870.
2.
Zurück zum Zitat A. Balakrishnan and A. Naeemi, Interconnect network analysis of many-core chips, IEEE Trans. Electron. Devices, 2011, vol. 58, no. 9, pp. 2831–2837.CrossRef A. Balakrishnan and A. Naeemi, Interconnect network analysis of many-core chips, IEEE Trans. Electron. Devices, 2011, vol. 58, no. 9, pp. 2831–2837.CrossRef
3.
Zurück zum Zitat Abinaya, E., Aishwarva, K., Lordwin, C.P.M., Kamatchi, G., and Malarvizhi, I., A performance aware security framework to avoid software attacks on Internet of Things (IoT) based patient monitoring system, 2018International Conference on Current Trends towards Converging Technologies (ICCTCT), pp. 1–6. https://doi.org/10.1109/ICCTCT.2018.8550955 Abinaya, E., Aishwarva, K., Lordwin, C.P.M., Kamatchi, G., and Malarvizhi, I., A performance aware security framework to avoid software attacks on Internet of Things (IoT) based patient monitoring system, 2018International Conference on Current Trends towards Converging Technologies (ICCTCT), pp. 1–6. https://​doi.​org/​10.​1109/​ICCTCT.​2018.​8550955
4.
Zurück zum Zitat Jungseob Lee and Chi-Chao Wang, Workload-adaptive process tuning strategy for power-efficient multi-core processors, ISLPEDэ10: Proceedings of the 16th ACM/IEEE International Symposium on Low Power Electronics and Design, 2010, pp. 225–230. https://doi.org/10.1145/1840845.1840889. Jungseob Lee and Chi-Chao Wang, Workload-adaptive process tuning strategy for power-efficient multi-core processors, ISLPEDэ10: Proceedings of the 16th ACM/IEEE International Symposium on Low Power Electronics and Design, 2010, pp. 225–230. https://​doi.​org/​10.​1145/​1840845.​1840889.
5.
Zurück zum Zitat Li, K., Performance analysis of power-aware task scheduling algorithms on multiprocessor computers with dynamic voltage and speed, IEEE Trans. Parallel Distrib. Syst., 2017, vol. 19, no. 11, pp. 1484–1497. Li, K., Performance analysis of power-aware task scheduling algorithms on multiprocessor computers with dynamic voltage and speed, IEEE Trans. Parallel Distrib. Syst., 2017, vol. 19, no. 11, pp. 1484–1497.
6.
Zurück zum Zitat Buttazzo, G., Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications, Springer US, 2010. Buttazzo, G., Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications, Springer US, 2010.
7.
Zurück zum Zitat Wentzlaff, D., On-chip interconnection architecture of the tile processor, IEEE Comput. Soc., 2007, vol. 27, no. 5, pp. 15–31. Wentzlaff, D., On-chip interconnection architecture of the tile processor, IEEE Comput. Soc., 2007, vol. 27, no. 5, pp. 15–31.
8.
Zurück zum Zitat Davis, R.I. and Burns, A., A survey of hard real-time scheduling for multiprocessor systems, ACM Comput. Surv., 2011, vol. 43, no. 4, pp. 35–44.CrossRef Davis, R.I. and Burns, A., A survey of hard real-time scheduling for multiprocessor systems, ACM Comput. Surv., 2011, vol. 43, no. 4, pp. 35–44.CrossRef
9.
Zurück zum Zitat Saurabh Dighe, Lessons learned from the 80 core tera-scale research processor, Intel Technol. J., 2009, vol. 13, no. 4, pp. 118–129. Saurabh Dighe, Lessons learned from the 80 core tera-scale research processor, Intel Technol. J., 2009, vol. 13, no. 4, pp. 118–129.
10.
Zurück zum Zitat Johnson, T. and Nawathe, U., An 8-core, 64-thread, 64-bit power efficient sparcsoc (niagara2), Proc. 2007 Int. Symp. Physical Design ISPD’07, New York, 2007, pp. 21–29. Johnson, T. and Nawathe, U., An 8-core, 64-thread, 64-bit power efficient sparcsoc (niagara2), Proc. 2007 Int. Symp. Physical Design ISPD’07, New York, 2007, pp. 21–29.
11.
Zurück zum Zitat Seo, E., Jeong, J., Park, S., and Lee, J., Energy efficient scheduling of real-time tasks on multicore processors, IEEE Trans. Parallel Distrib. Syst., 2008, vol. 19, no. 11, pp. 1540–1552.CrossRef Seo, E., Jeong, J., Park, S., and Lee, J., Energy efficient scheduling of real-time tasks on multicore processors, IEEE Trans. Parallel Distrib. Syst., 2008, vol. 19, no. 11, pp. 1540–1552.CrossRef
12.
Zurück zum Zitat Chen, J., Hsu, H., and Kuo, T., Leakage-aware energy-efficient scheduling of real-time tasks in multiprocessor systems, Proceedings of the 12th IEEE RTAS, Washington, DC, 2006, pp. 408–417. Chen, J., Hsu, H., and Kuo, T., Leakage-aware energy-efficient scheduling of real-time tasks in multiprocessor systems, Proceedings of the 12th IEEE RTAS, Washington, DC, 2006, pp. 408–417.
13.
Zurück zum Zitat Keqin Li, Improving multicore server performance and reducing energy consumption by workload dependent dynamic power management, IEEE Trans. Cloud Comput., 2015, vol. 4, no. 2, pp. 122–137.CrossRef Keqin Li, Improving multicore server performance and reducing energy consumption by workload dependent dynamic power management, IEEE Trans. Cloud Comput., 2015, vol. 4, no. 2, pp. 122–137.CrossRef
14.
Zurück zum Zitat Spuri, M. and Buttazzo, G., Scheduling aperiodic tasks in dynamic priority systems, J. Real-Time Syst., 1996, vol. 10, no. 2, pp. 179–210.CrossRef Spuri, M. and Buttazzo, G., Scheduling aperiodic tasks in dynamic priority systems, J. Real-Time Syst., 1996, vol. 10, no. 2, pp. 179–210.CrossRef
15.
Zurück zum Zitat Kinsy, M.A., Myong Hyon Cho, Keun Sup Shim, Mieszko Lis, Suh, G.E., and Srinivas Devadas, Optimal and heuristic application-aware oblivious routing, IEEE Trans. Comput., 2013, vol. 62, no. 1, pp. 59–63.MathSciNetCrossRef Kinsy, M.A., Myong Hyon Cho, Keun Sup Shim, Mieszko Lis, Suh, G.E., and Srinivas Devadas, Optimal and heuristic application-aware oblivious routing, IEEE Trans. Comput., 2013, vol. 62, no. 1, pp. 59–63.MathSciNetCrossRef
16.
Zurück zum Zitat Kinsy, M.A., Myong Hyon Cho, Keun Sup Shim, Mieszko Lis, Suh, G.E., and Srinivas Devadas, Optimal and heuristic application-aware oblivious routing, IEEE Trans. Comput., 2013, vol. 62, no. 1, pp. 59–63.MathSciNetCrossRef Kinsy, M.A., Myong Hyon Cho, Keun Sup Shim, Mieszko Lis, Suh, G.E., and Srinivas Devadas, Optimal and heuristic application-aware oblivious routing, IEEE Trans. Comput., 2013, vol. 62, no. 1, pp. 59–63.MathSciNetCrossRef
17.
Zurück zum Zitat Wan Yeon Lee, Energy-efficient scheduling of periodic real-time tasks on lightly loaded multi-core processors, IEEE Trans. Parallel Distrib. Syst., 2017, vol. 23, no. 3, pp. 530–537. Wan Yeon Lee, Energy-efficient scheduling of periodic real-time tasks on lightly loaded multi-core processors, IEEE Trans. Parallel Distrib. Syst., 2017, vol. 23, no. 3, pp. 530–537.
18.
Zurück zum Zitat Mieszko Lis, Scalable, accurate multicore simulation in the 1000-core era, IEEE ISPASS, 2011, pp. 175–185.CrossRef Mieszko Lis, Scalable, accurate multicore simulation in the 1000-core era, IEEE ISPASS, 2011, pp. 175–185.CrossRef
19.
Zurück zum Zitat Weise, T., Global Optimization Algorithms: Theory and Application. http://www.it-weise.de/. Weise, T., Global Optimization Algorithms: Theory and Application. http://​www.​it-weise.​de/​.​
20.
Zurück zum Zitat Lee, W., Energy-saving DVFS scheduling of multiple periodic realtime tasks on multi-core processors, 13th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, 2009, pp. 216–223. Lee, W., Energy-saving DVFS scheduling of multiple periodic realtime tasks on multi-core processors, 13th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, 2009, pp. 216–223.
21.
Zurück zum Zitat Prabhaker, M.L.C., Manivannan, K., Jananiand, S., and Sitalakshmi, P., Performance based investigation of scheduling algorithm on multicore processor, Adv. Nat. Appl. Sci., 2018, vol. 11, no. 7, pp. 507–519. Prabhaker, M.L.C., Manivannan, K., Jananiand, S., and Sitalakshmi, P., Performance based investigation of scheduling algorithm on multicore processor, Adv. Nat. Appl. Sci., 2018, vol. 11, no. 7, pp. 507–519.
22.
Zurück zum Zitat TGFF. https://robertdick.org/projects/tgff/index.html. Accessed June 2019. TGFF. https://​robertdick.​org/​projects/​tgff/​index.​html.​ Accessed June 2019.
23.
Zurück zum Zitat Lee, W.Y. and Lee, H., Energy-efficient scheduling for multiprocessors, Electron. Lett., 2009, vol. 42, no. 21, pp. 1200–1235.CrossRef Lee, W.Y. and Lee, H., Energy-efficient scheduling for multiprocessors, Electron. Lett., 2009, vol. 42, no. 21, pp. 1200–1235.CrossRef
24.
Zurück zum Zitat Wann-Yun Shieh, Energy and transition-aware runtime task scheduling for multicore processors, J. Parallel Distrib. Comput., 2017, vol. 73, pp. 1225–1238.CrossRef Wann-Yun Shieh, Energy and transition-aware runtime task scheduling for multicore processors, J. Parallel Distrib. Comput., 2017, vol. 73, pp. 1225–1238.CrossRef
25.
Zurück zum Zitat Yue-Jiao Gonga and Wei-Neng Chen, Distributed evolutionary algorithms and their models: A survey of the state-of-the-art, J. Appl. Soft Comput., 2015, vol. 34, pp. 286–300.CrossRef Yue-Jiao Gonga and Wei-Neng Chen, Distributed evolutionary algorithms and their models: A survey of the state-of-the-art, J. Appl. Soft Comput., 2015, vol. 34, pp. 286–300.CrossRef
26.
Zurück zum Zitat Vijay AnandKorthikanti, Analysis of parallel algorithms for energy conservation in scalable multicore architectures, International Conference on Parallel Processing, ICPP’09, 2009, pp. 212–219. Vijay AnandKorthikanti, Analysis of parallel algorithms for energy conservation in scalable multicore architectures, International Conference on Parallel Processing, ICPP’09, 2009, pp. 212–219.
Metadaten
Titel
Real-Time Task Schedulers for a High-Performance Multi-Core System
verfasst von
M. Lordwin Cecil Prabhaker
R. Saravana Ram
Publikationsdatum
01.07.2020
Verlag
Pleiades Publishing
Erschienen in
Automatic Control and Computer Sciences / Ausgabe 4/2020
Print ISSN: 0146-4116
Elektronische ISSN: 1558-108X
DOI
https://doi.org/10.3103/S0146411620040094

Weitere Artikel der Ausgabe 4/2020

Automatic Control and Computer Sciences 4/2020 Zur Ausgabe