Low-voltage-driven Pt/BiFeO₃/DyScO₃/p-Si-based metal–ferroelectric–insulator–semiconductor device for non-volatile memory

In recent years, ferroelectric random access memory has drawn considerable attention as promising replacement to both dynamic random access memory and flash memory. Specifically in metal–ferroelectric–insulator–semiconductor (MFIS)-based structures, bi-stable polarization of ferroelectric gate even in absence of power holds the resistance state of semiconductor-drain channel between two logic states and offers additional features of non-destructive readout and non-volatile storage capability. However, insulating layer in such structure leads to high depolarizing field across FE layer and in turn high-voltage operation. In the present work, comprehensive performance of low-voltage-driven MFIS device, i.e., Pt (40 nm)/BiFeO₃ (265 nm)/DyScO₃ (6 nm)/Si is evaluated for gate voltage stress (± 2 to ± 9 V) at different thermal agitation (200–400 K). Fat capacitance–voltage (C–V) hysteresis centered at zero bias with large memory window (ΔV _FB) of 1.9 V at low operating voltage of ± 5 V, and stable data retention with distinguishable ON/OFF state values specifies strong charge storage potential of MFIS device in extreme conditions of ± 100 K. X-ray diffraction revealed polycrystalline and rhombohedral R3c phase of BiFeO₃ film and out-of-plane piezoresponse force microscopy analysis showed the ultrafast domain switching with sharp contrast. Complete 180° phase reversal in hysteresis loop and bufferfly-shaped piezo-actuation amplitude loop further confirmed the enhanced ferroelectric properties of BiFeO₃ thin films. Nonlinear J–V curves of MFIS structure were investigated to understand the device reliability and charge transport mechanism. These encouraging results are crucial for designing more reliable integrated MFIS-based non-destructive readout non-volatile memory devices.