5. Optimizing Power @ Design Time – Architecture, Algorithms, and Systems

Excerpt

This chapter presents power–area–performance optimization at the higher levels of the design hierarchy – this includes joint optimization efforts at the circuit, architecture, and algorithm levels. The common goal in all these optimizations is to reach a global optimum in the power–area–performance space for a given design. The complexity of global optimization involving variables from all layers of the design-abstraction chain can be quite high. Fortunately, it turns out that many of the variables can be independently tuned, so a designer can partition optimization routines into smaller tractable problems. This modular approach helps gain insight into individual variables and provides a way to navigate top-level optimization through inter-layer interactions. …