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Erschienen in: Real-Time Systems 2/2018

23.02.2018

Patmos: a time-predictable microprocessor

verfasst von: Martin Schoeberl, Wolfgang Puffitsch, Stefan Hepp, Benedikt Huber, Daniel Prokesch

Erschienen in: Real-Time Systems | Ausgabe 2/2018

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Abstract

Current processors provide high average-case performance, as they are optimized for general purpose computing. However, those optimizations often lead to a high worst-case execution time (WCET). WCET analysis tools model the architectural features that increase average-case performance. To keep analysis complexity manageable, those models need to abstract from implementation details. This abstraction further increases the WCET bound. This paper presents a way out of this dilemma: a processor designed for real-time systems. We design and optimize a processor, called Patmos, for low WCET bounds rather than for high average-case performance. Patmos is a dual-issue, statically scheduled RISC processor. A method cache serves as the cache for the instructions and a split cache organization simplifies the WCET analysis of the data cache. To fill the dual-issue pipeline with enough useful instructions, Patmos relies on a customized compiler. The compiler also plays a central role in optimizing the application for the WCET instead of average-case performance.

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Fußnoten
3
The port of RTEMS is available at https://​github.​com/​t-crest/​rtems.
 
6
CoreMark scores for LEON3, MicroBlaze, and NIOS II are from http://​www.​eembc.​org/​coremark/​index.​php, last accessed 29 November 2016.
 
7
Stratix 10 is not (yet) supported in the latest Quartus version.
 
Literatur
Zurück zum Zitat Abbaspour S, Brandner F, Schoeberl M (2013) A time-predictable stack cache. In: Proceedings of the 9th workshop on software technologies for embedded and ubiquitous systems Abbaspour S, Brandner F, Schoeberl M (2013) A time-predictable stack cache. In: Proceedings of the 9th workshop on software technologies for embedded and ubiquitous systems
Zurück zum Zitat Akesson B, Goossens K, Ringhofer M (2007) Predator: a predictable sdram memory controller. In: CODES+ISSS ’07: proceedings of the 5th IEEE/ACM international conference on hardware/software codesign and system synthesis. ACM, New York, pp 251–256. https://doi.org/10.1145/1289816.1289877 Akesson B, Goossens K, Ringhofer M (2007) Predator: a predictable sdram memory controller. In: CODES+ISSS ’07: proceedings of the 5th IEEE/ACM international conference on hardware/software codesign and system synthesis. ACM, New York, pp 251–256. https://​doi.​org/​10.​1145/​1289816.​1289877
Zurück zum Zitat Allen J, Kennedy K, Porterfield C, Warren J (1983) Conversion of control dependence to data dependence. In: Proceeding of the 10th ACM symposium on principles of programming languages, pp 177–189 Allen J, Kennedy K, Porterfield C, Warren J (1983) Conversion of control dependence to data dependence. In: Proceeding of the 10th ACM symposium on principles of programming languages, pp 177–189
Zurück zum Zitat Arnold R, Mueller F, Whalley D, Harmon M (1994) Bounding worst-case instruction cache performance. In: IEEE real-time systems symposium, pp 172–181 Arnold R, Mueller F, Whalley D, Harmon M (1994) Bounding worst-case instruction cache performance. In: IEEE real-time systems symposium, pp 172–181
Zurück zum Zitat Axer P, Ernst R, Falk H, Girault A, Grund D, Guan N, Jonsson B, Marwedel P, Reineke J, Rochange C, Sebastian M, Hanxleden RV, Wilhelm R, Yi W (2013) Building timing predictable embedded systems. ACM Trans Embed Syst 13(4):82 Axer P, Ernst R, Falk H, Girault A, Grund D, Guan N, Jonsson B, Marwedel P, Reineke J, Rochange C, Sebastian M, Hanxleden RV, Wilhelm R, Yi W (2013) Building timing predictable embedded systems. ACM Trans Embed Syst 13(4):82
Zurück zum Zitat Bachrach J, Vo H, Richards B, Lee Y, Waterman A, Avizienis R, Wawrzynek J, Asanovic K (2012) Chisel: constructing hardware in a scala embedded language. In: The 49th annual design automation conference (DAC 2012, Groeneveld P, Sciuto D, Hassoun S (eds). ACM, San Francisco, pp 1216–1225 Bachrach J, Vo H, Richards B, Lee Y, Waterman A, Avizienis R, Wawrzynek J, Asanovic K (2012) Chisel: constructing hardware in a scala embedded language. In: The 49th annual design automation conference (DAC 2012, Groeneveld P, Sciuto D, Hassoun S (eds). ACM, San Francisco, pp 1216–1225
Zurück zum Zitat Baldovin A, Mezzetti E, Vardanega T (2012) A time-composable operating system. In: Vardanega T (ed.) 12th international workshop on worst-case execution time analysis, WCET 2012, July 10, 2012, Pisa OASICS. Schloss Dagstuhl-Leibniz-Zentrum fuer Informatik vol 23, pp 69–80 Baldovin A, Mezzetti E, Vardanega T (2012) A time-composable operating system. In: Vardanega T (ed.) 12th international workshop on worst-case execution time analysis, WCET 2012, July 10, 2012, Pisa OASICS. Schloss Dagstuhl-Leibniz-Zentrum fuer Informatik vol 23, pp 69–80
Zurück zum Zitat Degasperi P, Hepp S, Puffitsch W, Schoeberl M (2014) A method cache for Patmos. In: Proceedings of the 17th IEEE symposium on object/component/service-oriented real-time distributed computing (ISORC 2014). IEEE, Reno, pp 100–108. https://doi.org/10.1109/ISORC.2014.47 Degasperi P, Hepp S, Puffitsch W, Schoeberl M (2014) A method cache for Patmos. In: Proceedings of the 17th IEEE symposium on object/component/service-oriented real-time distributed computing (ISORC 2014). IEEE, Reno, pp 100–108. https://​doi.​org/​10.​1109/​ISORC.​2014.​47
Zurück zum Zitat Delange J, Lec L (2011) POK, an ARINC653-compliant operating system released under the BSD license. In: 13th Real-Time Linux Workshop, vol 10 Delange J, Lec L (2011) POK, an ARINC653-compliant operating system released under the BSD license. In: 13th Real-Time Linux Workshop, vol 10
Zurück zum Zitat Delvai M, Huber W, Puschner P, Steininger A (2003) Processor support for temporal predictability—the SPEAR design example. In: Proceedings of the 15th Euromicro international conference on real-time systems Delvai M, Huber W, Puschner P, Steininger A (2003) Processor support for temporal predictability—the SPEAR design example. In: Proceedings of the 15th Euromicro international conference on real-time systems
Zurück zum Zitat Edwards SA, Kim S, Lee EA, Liu I, Patel HD, Schoeberl M (2009) A disruptive computer design idea: architectures with repeatable timing. In: Proceedings of IEEE international conference on computer design (ICCD 2009). IEEE, Lake Tahoe Edwards SA, Kim S, Lee EA, Liu I, Patel HD, Schoeberl M (2009) A disruptive computer design idea: architectures with repeatable timing. In: Proceedings of IEEE international conference on computer design (ICCD 2009). IEEE, Lake Tahoe
Zurück zum Zitat Falk H, Kleinsorge JC (2009) Optimal static WCET-aware scratchpad allocation of program code. In: DAC ’09: Proceedings of the conference on design automation, pp 732–737 Falk H, Kleinsorge JC (2009) Optimal static WCET-aware scratchpad allocation of program code. In: DAC ’09: Proceedings of the conference on design automation, pp 732–737
Zurück zum Zitat Falk H, Lokuciejewski P (2010) A compiler framework for the reduction of worst-case execution time. Real-Time Syst 46:1–50CrossRefMATH Falk H, Lokuciejewski P (2010) A compiler framework for the reduction of worst-case execution time. Real-Time Syst 46:1–50CrossRefMATH
Zurück zum Zitat Ferdinand C, Wilhelm R (1999) Efficient and precise cache behavior prediction for real-time systems. Real-Time Syst 17(2–3):131–181CrossRef Ferdinand C, Wilhelm R (1999) Efficient and precise cache behavior prediction for real-time systems. Real-Time Syst 17(2–3):131–181CrossRef
Zurück zum Zitat Garside J, Audsley NC (2013) Investigating shared memory tree prefetching within multimedia noc architectures. In: Memory architecture and organisation workshop Garside J, Audsley NC (2013) Investigating shared memory tree prefetching within multimedia noc architectures. In: Memory architecture and organisation workshop
Zurück zum Zitat Healy CA, Arnold RD, Mueller F, Whalley DB, Harmon MG (1999) Bounding pipeline and instruction cache performance. IEEE Trans. Comput 48(1):53–70CrossRef Healy CA, Arnold RD, Mueller F, Whalley DB, Harmon MG (1999) Bounding pipeline and instruction cache performance. IEEE Trans. Comput 48(1):53–70CrossRef
Zurück zum Zitat Heckmann R, Ferdinand C (2013) Worst-case execution time prediction by static program analysis. Technical report, AbsInt Angewandte Informatik GmbH. [Online, last accessed November 2013] Heckmann R, Ferdinand C (2013) Worst-case execution time prediction by static program analysis. Technical report, AbsInt Angewandte Informatik GmbH. [Online, last accessed November 2013]
Zurück zum Zitat Heckmann R, Langenbach M, Thesing S, Wilhelm R (2003) The influence of processor architecture on the design and results of WCET tools. Proc IEEE 91(7):1038–1054CrossRef Heckmann R, Langenbach M, Thesing S, Wilhelm R (2003) The influence of processor architecture on the design and results of WCET tools. Proc IEEE 91(7):1038–1054CrossRef
Zurück zum Zitat Hepp S, Brandner F (2014) Splitting functions into single-entry regions. In: Chatha KS, Ernst R, Raghunathan A, Iyer R (eds) 2014 International conference on compilers, architecture and synthesis for embedded systems, CASES 2014, Uttar Pradesh, October 12-17, 2014, ACM. pp 17:1–17:10. https://doi.org/10.1145/2656106.2656128 Hepp S, Brandner F (2014) Splitting functions into single-entry regions. In: Chatha KS, Ernst R, Raghunathan A, Iyer R (eds) 2014 International conference on compilers, architecture and synthesis for embedded systems, CASES 2014, Uttar Pradesh, October 12-17, 2014, ACM. pp 17:1–17:10. https://​doi.​org/​10.​1145/​2656106.​2656128
Zurück zum Zitat Huber B, Prokesch D, Puschner P (2013) Combined WCET analysis of bitcode and machine code using control-flow relation graphs. In: Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems (LCTES 2013). The Association for Computing Machinery, pp 163–172. https://doi.org/10.1145/2499369.2465567 Huber B, Prokesch D, Puschner P (2013) Combined WCET analysis of bitcode and machine code using control-flow relation graphs. In: Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems (LCTES 2013). The Association for Computing Machinery, pp 163–172. https://​doi.​org/​10.​1145/​2499369.​2465567
Zurück zum Zitat Huber B, Puffitsch W, Schoeberl M (2010) WCET driven design space exploration of an object cache. In: Proceedings of the 8th international workshop on java technologies for real-time and embedded systems (JTRES 2010). ACM, New York, pp 26–35. https://doi.org/10.1145/1850771.1850775 Huber B, Puffitsch W, Schoeberl M (2010) WCET driven design space exploration of an object cache. In: Proceedings of the 8th international workshop on java technologies for real-time and embedded systems (JTRES 2010). ACM, New York, pp 26–35. https://​doi.​org/​10.​1145/​1850771.​1850775
Zurück zum Zitat Hwu WMW, Mahlke SA, Chen WY, Chang PP, Warter NJ, Bringmann RA, Ouellette RG, Hank RE, Kiyohara T, Haab GE, Holm JG, Lavery DM (1993) The superblock: an effective technique for vliw and superscalar compilation. J Supercomput 7(1):229–248. https://doi.org/10.1007/BF01205185 CrossRef Hwu WMW, Mahlke SA, Chen WY, Chang PP, Warter NJ, Bringmann RA, Ouellette RG, Hank RE, Kiyohara T, Haab GE, Holm JG, Lavery DM (1993) The superblock: an effective technique for vliw and superscalar compilation. J Supercomput 7(1):229–248. https://​doi.​org/​10.​1007/​BF01205185 CrossRef
Zurück zum Zitat Kluge F, Gerdes M, Ungerer T (2014) An operating system for safety-critical applications on manycore processors. In: 17th IEEE international symposium on object oriented real-time distributed computing (ISORC), IEEE, pp 238–245 Kluge F, Gerdes M, Ungerer T (2014) An operating system for safety-critical applications on manycore processors. In: 17th IEEE international symposium on object oriented real-time distributed computing (ISORC), IEEE, pp 238–245
Zurück zum Zitat Kluge F, Schoeberl M, Ungerer T (2016) Support for the logical execution time model on a time-predictable multicore processor. In: 14th international workshop on real-time networks. ACM SIGBED Review, Toulouse Kluge F, Schoeberl M, Ungerer T (2016) Support for the logical execution time model on a time-predictable multicore processor. In: 14th international workshop on real-time networks. ACM SIGBED Review, Toulouse
Zurück zum Zitat Lakis E, Schoeberl M (2013) An SDRAM controller for real-time systems. In: Proceedings of the 9th workshop on software technologies for embedded and ubiquitous systems Lakis E, Schoeberl M (2013) An SDRAM controller for real-time systems. In: Proceedings of the 9th workshop on software technologies for embedded and ubiquitous systems
Zurück zum Zitat Lam, M (1988) Software pipelining: an effective scheduling technique for VLIW machines. In: Proceedings of the ACM SIGPLAN 1988 conference on programming language design and implementation, PLDI ’88. ACM, New York, pp 318–328 https://doi.org/10.1145/53990.54022 Lam, M (1988) Software pipelining: an effective scheduling technique for VLIW machines. In: Proceedings of the ACM SIGPLAN 1988 conference on programming language design and implementation, PLDI ’88. ACM, New York, pp 318–328 https://​doi.​org/​10.​1145/​53990.​54022
Zurück zum Zitat Lickly B, Liu I, Kim S, Patel HD, Edwards SA, Lee EA (2008) Predictable programming on a precision timed architecture. In: Altman ER (ed) Proceedings of the international conference on compilers, architecture, and synthesis for embedded systems (CASES 2008). ACM, Atlanta, pp 137–146 Lickly B, Liu I, Kim S, Patel HD, Edwards SA, Lee EA (2008) Predictable programming on a precision timed architecture. In: Altman ER (ed) Proceedings of the international conference on compilers, architecture, and synthesis for embedded systems (CASES 2008). ACM, Atlanta, pp 137–146
Zurück zum Zitat Lisper B (2014) SWEET: a tool for WCET flow analysis. In: Steffen B (ed) 6th International symposium on leveraging applications of formal methods, verification and validation. Springer, pp 482–485. Lisper B (2014) SWEET: a tool for WCET flow analysis. In: Steffen B (ed) 6th International symposium on leveraging applications of formal methods, verification and validation. Springer, pp 482–485.
Zurück zum Zitat Liu I (2012) Precision timed machines. Ph.D. thesis, EECS Department, University of California, Berkeley Liu I (2012) Precision timed machines. Ph.D. thesis, EECS Department, University of California, Berkeley
Zurück zum Zitat Liu I, Reineke J, Broman D, Zimmer M, Lee EA (2012) A PRET microarchitecture implementation with repeatable timing and competitive performance. In: Proceedings of IEEE international conference on computer design (ICCD 2012) Liu I, Reineke J, Broman D, Zimmer M, Lee EA (2012) A PRET microarchitecture implementation with repeatable timing and competitive performance. In: Proceedings of IEEE international conference on computer design (ICCD 2012)
Zurück zum Zitat Liu I, Reineke J, Lee EA (2010) A PRET architecture supporting concurrent programs with composable timing properties. In: Signals, systems and computers, 2010 conference record of the forty-four asilomar conference on Liu I, Reineke J, Lee EA (2010) A PRET architecture supporting concurrent programs with composable timing properties. In: Signals, systems and computers, 2010 conference record of the forty-four asilomar conference on
Zurück zum Zitat Metzlaff S, Ungerer T (2012) Replacement policies for a function-based instruction memory: a quantification of the impact on hardware complexity and wcet estimates. In: Real-time systems (ECRTS), 2012 24th Euromicro conference on, pp 112 –121. https://doi.org/10.1109/ECRTS.2012.22 Metzlaff S, Ungerer T (2012) Replacement policies for a function-based instruction memory: a quantification of the impact on hardware complexity and wcet estimates. In: Real-time systems (ECRTS), 2012 24th Euromicro conference on, pp 112 –121. https://​doi.​org/​10.​1109/​ECRTS.​2012.​22
Zurück zum Zitat Mische J, Guliashvili I, Uhrig S, Ungerer T (2010) How to enhance a superscalar processor to provide hard real-time capable in-order smt. In: 23rd International conference on architecture of computing systems (ARCS 2010). Springer, University of Augsburg, pp 2–14. https://doi.org/10.1007/978-3-642-11950-7_2 Mische J, Guliashvili I, Uhrig S, Ungerer T (2010) How to enhance a superscalar processor to provide hard real-time capable in-order smt. In: 23rd International conference on architecture of computing systems (ARCS 2010). Springer, University of Augsburg, pp 2–14. https://​doi.​org/​10.​1007/​978-3-642-11950-7_​2
Zurück zum Zitat Prokesch D, Hepp S, Puschner PP (2015) A generator for time-predictable code. In: IEEE 18th international symposium on real-time distributed computing, ISORC 2015, Auckland 13-17 April, 2015. IEEE Computer Society, pp 27–34. https://doi.org/10.1109/ISORC.2015.40 Prokesch D, Hepp S, Puschner PP (2015) A generator for time-predictable code. In: IEEE 18th international symposium on real-time distributed computing, ISORC 2015, Auckland 13-17 April, 2015. IEEE Computer Society, pp 27–34. https://​doi.​org/​10.​1109/​ISORC.​2015.​40
Zurück zum Zitat Prokesch D, Huber B, Puschner P (2014) Towards automated generation of time-predictable code. In: International workshop on worst-case execution time analysis, OASIcs, vol 39, pp 103–112. Schloss Dagstuhl Prokesch D, Huber B, Puschner P (2014) Towards automated generation of time-predictable code. In: International workshop on worst-case execution time analysis, OASIcs, vol 39, pp 103–112. Schloss Dagstuhl
Zurück zum Zitat Puschner P (2005) Experiments with WCET-oriented programming and the single-path architecture. In: Proceeding of the 10th IEEE international workshop on object-oriented real-time dependable systems Puschner P (2005) Experiments with WCET-oriented programming and the single-path architecture. In: Proceeding of the 10th IEEE international workshop on object-oriented real-time dependable systems
Zurück zum Zitat Puschner P, Kirner R, Huber B, Prokesch D (2012) Compiling for time predictability. In: Ortmeier F, Daniel P (eds) Computer safety, reliability, and security. Lecture Notes in Computer Science. vol 7613, Springer, Berlin, pp 382–391 Puschner P, Kirner R, Huber B, Prokesch D (2012) Compiling for time predictability. In: Ortmeier F, Daniel P (eds) Computer safety, reliability, and security. Lecture Notes in Computer Science. vol 7613, Springer, Berlin, pp 382–391
Zurück zum Zitat Puschner P, Prokesch D, Huber B, Knoop J, Hepp S, Gebhard G (2013) The T-CREST approach of compiler and WCET-analysis integration. In: 9th workshop on software technologies for future embedded and ubiquitious systems (SEUS 2013), pp 33–40 Puschner P, Prokesch D, Huber B, Knoop J, Hepp S, Gebhard G (2013) The T-CREST approach of compiler and WCET-analysis integration. In: 9th workshop on software technologies for future embedded and ubiquitious systems (SEUS 2013), pp 33–40
Zurück zum Zitat Rocha A, Silva C, Sørensen RB, Sparsø J, Schoeberl M (2016) Avionics applications on a time-predictable chip-multiprocessor. In: 24th Euromicro international conference on parallel, distributed, and network-based processing (PDP 2016). IEEE Computer Society, pp 777–785. https://doi.org/10.1109/PDP.2016.36 Rocha A, Silva C, Sørensen RB, Sparsø J, Schoeberl M (2016) Avionics applications on a time-predictable chip-multiprocessor. In: 24th Euromicro international conference on parallel, distributed, and network-based processing (PDP 2016). IEEE Computer Society, pp 777–785. https://​doi.​org/​10.​1109/​PDP.​2016.​36
Zurück zum Zitat Rochange C, Sainrat P (2003) Towards designing WCET-predictable processors. In: Proceedings of the 3rd international workshop on worst-case execution time analysis, WCET 2003, pp 87–90 Rochange C, Sainrat P (2003) Towards designing WCET-predictable processors. In: Proceedings of the 3rd international workshop on worst-case execution time analysis, WCET 2003, pp 87–90
Zurück zum Zitat Schoeberl M (2004) A time predictable instruction cache for a Java processor. In: On the move to meaningful internet systems 2004: workshop on java technologies for real-time and embedded systems (JTRES 2004), LNCS, vol 3292. Springer, Agia Napa, pp 371–382. https://doi.org/10.1007/b102133 Schoeberl M (2004) A time predictable instruction cache for a Java processor. In: On the move to meaningful internet systems 2004: workshop on java technologies for real-time and embedded systems (JTRES 2004), LNCS, vol 3292. Springer, Agia Napa, pp 371–382. https://​doi.​org/​10.​1007/​b102133
Zurück zum Zitat Schoeberl M (2009) Time-predictable cache organization. In: Proceedings of the first international workshop on software technologies for future dependable distributed systems (STFSSD 2009). IEEE Computer Society, Tokyo, pp 11–16. https://doi.org/10.1109/STFSSD.2009.10 Schoeberl M (2009) Time-predictable cache organization. In: Proceedings of the first international workshop on software technologies for future dependable distributed systems (STFSSD 2009). IEEE Computer Society, Tokyo, pp 11–16. https://​doi.​org/​10.​1109/​STFSSD.​2009.​10
Zurück zum Zitat Schoeberl, M.: Is time predictability quantifiable? In: International conference on embedded computer systems (SAMOS 2012). IEEE, Samos Schoeberl, M.: Is time predictability quantifiable? In: International conference on embedded computer systems (SAMOS 2012). IEEE, Samos
Zurück zum Zitat Schoeberl M, Abbaspour S, Akesson B, Audsley N, Capasso R, Garside J, Goossens K, Goossens S, Hansen S, Heckmann R, Hepp S, Huber B, Jordan A, Kasapaki E, Knoop J, Li Y, Prokesch D, Puffitsch W, Puschner P, Rocha A, Silva C, Sparsø J, Tocchi A (2015) T-CREST: time-predictable multi-core architecture for embedded systems. J Syst Archit 61(9):449–471. https://doi.org/10.1016/j.sysarc.2015.04.002 CrossRef Schoeberl M, Abbaspour S, Akesson B, Audsley N, Capasso R, Garside J, Goossens K, Goossens S, Hansen S, Heckmann R, Hepp S, Huber B, Jordan A, Kasapaki E, Knoop J, Li Y, Prokesch D, Puffitsch W, Puschner P, Rocha A, Silva C, Sparsø J, Tocchi A (2015) T-CREST: time-predictable multi-core architecture for embedded systems. J Syst Archit 61(9):449–471. https://​doi.​org/​10.​1016/​j.​sysarc.​2015.​04.​002 CrossRef
Zurück zum Zitat Schoeberl M, Brandner F, Hepp S, Puffitsch W, Prokesch D (2014) Patmos reference handbook. Technical University of Denmark, Technical report Schoeberl M, Brandner F, Hepp S, Puffitsch W, Prokesch D (2014) Patmos reference handbook. Technical University of Denmark, Technical report
Zurück zum Zitat Schoeberl M, Brandner F, Sparsø J, Kasapaki E (2012) A statically scheduled time-division-multiplexed network-on-chip for real-time systems. In: Proceedings of the 6th international symposium on networks-on-chip (NOCS). IEEE, Lyngby, pp 152–160. https://doi.org/10.1109/NOCS.2012.25 Schoeberl M, Brandner F, Sparsø J, Kasapaki E (2012) A statically scheduled time-division-multiplexed network-on-chip for real-time systems. In: Proceedings of the 6th international symposium on networks-on-chip (NOCS). IEEE, Lyngby, pp 152–160. https://​doi.​org/​10.​1109/​NOCS.​2012.​25
Zurück zum Zitat Schoeberl M, Puffitsch W, Huber B (2009) Towards time-predictable data caches for chip-multiprocessors. In: Proceedings of the seventh IFIP workshop on software technologies for future embedded and ubiquitous systems (SEUS 2009), no. 5860 in LNCS, Springer, pp 180–191 Schoeberl M, Puffitsch W, Huber B (2009) Towards time-predictable data caches for chip-multiprocessors. In: Proceedings of the seventh IFIP workshop on software technologies for future embedded and ubiquitous systems (SEUS 2009), no. 5860 in LNCS, Springer, pp 180–191
Zurück zum Zitat Schoeberl M, Schleuniger P, Puffitsch W, Brandner F, Probst CW, Karlsson S, Thorn T (2011) Towards a time-predictable dual-issue microprocessor: the Patmos approach. In: First workshop on bringing theory to practice: predictability and performance in embedded systems (PPES 2011). Grenoble, pp 11–20 Schoeberl M, Schleuniger P, Puffitsch W, Brandner F, Probst CW, Karlsson S, Thorn T (2011) Towards a time-predictable dual-issue microprocessor: the Patmos approach. In: First workshop on bringing theory to practice: predictability and performance in embedded systems (PPES 2011). Grenoble, pp 11–20
Zurück zum Zitat Sparsø J, Kasapaki E, Schoeberl M (2013) An area-efficient network interface for a TDM-based network-on-chip. In: Proceedings of the conference on design, automation and test in Europe, DATE ’13. EDA Consortium, San Jose, pp 1044–1047 Sparsø J, Kasapaki E, Schoeberl M (2013) An area-efficient network interface for a TDM-based network-on-chip. In: Proceedings of the conference on design, automation and test in Europe, DATE ’13. EDA Consortium, San Jose, pp 1044–1047
Zurück zum Zitat Starke RA (2016) Design and evaluation of a vliw processor for real-time systems. Ph.D. thesis, Universidade Federal de Santa Catarina Starke RA (2016) Design and evaluation of a vliw processor for real-time systems. Ph.D. thesis, Universidade Federal de Santa Catarina
Zurück zum Zitat Thiele L, Wilhelm R (2004) Design for timing predictability. Real-Time Syst 28(2–3):157–177CrossRef Thiele L, Wilhelm R (2004) Design for timing predictability. Real-Time Syst 28(2–3):157–177CrossRef
Zurück zum Zitat Whitham J (2008) Real-time processor architectures for worst case execution time reduction. Ph.D. thesis, University of York Whitham J (2008) Real-time processor architectures for worst case execution time reduction. Ph.D. thesis, University of York
Zurück zum Zitat Whitham J, Audsley N (2008) Using trace scratchpads to reduce execution times in predictable real-time architectures. In: Proceedings of the real-time and embedded technology and applications symposium (RTAS 2008), pp 305–316. https://doi.org/10.1109/RTAS.2008.11 Whitham J, Audsley N (2008) Using trace scratchpads to reduce execution times in predictable real-time architectures. In: Proceedings of the real-time and embedded technology and applications symposium (RTAS 2008), pp 305–316. https://​doi.​org/​10.​1109/​RTAS.​2008.​11
Zurück zum Zitat Whitham J, Audsley N (2009) Implementing time-predictable load and store operations. In: Proceedings of the international conference on embedded software (EMSOFT 2009) Whitham J, Audsley N (2009) Implementing time-predictable load and store operations. In: Proceedings of the international conference on embedded software (EMSOFT 2009)
Zurück zum Zitat Wilhelm R, Grund D, Reineke J, Schlickling M, Pister M, Ferdinand C (2009) Memory hierarchies, pipelines, and buses for future architectures in time-critical embedded systems. IEEE Trans CAD Integr Circuits Sys 28(7):966–978CrossRef Wilhelm R, Grund D, Reineke J, Schlickling M, Pister M, Ferdinand C (2009) Memory hierarchies, pipelines, and buses for future architectures in time-critical embedded systems. IEEE Trans CAD Integr Circuits Sys 28(7):966–978CrossRef
Zurück zum Zitat Ziccardi M, Schoeberl M, Vardanega T (2015) A time-composable operating system for the Patmos processor. In: The 30th ACM/SIGAPP symposium on applied computing, embedded systems track. ACM Press, Salamanca Ziccardi M, Schoeberl M, Vardanega T (2015) A time-composable operating system for the Patmos processor. In: The 30th ACM/SIGAPP symposium on applied computing, embedded systems track. ACM Press, Salamanca
Zurück zum Zitat Zimmer M, Broman D, Shaver C, Lee EA (2014) FlexPRET: a processor platform for mixed-criticality systems. In: Proceedings of the 20th ieee real-time and embedded technology and application symposium (RTAS). Berlin Zimmer M, Broman D, Shaver C, Lee EA (2014) FlexPRET: a processor platform for mixed-criticality systems. In: Proceedings of the 20th ieee real-time and embedded technology and application symposium (RTAS). Berlin
Metadaten
Titel
Patmos: a time-predictable microprocessor
verfasst von
Martin Schoeberl
Wolfgang Puffitsch
Stefan Hepp
Benedikt Huber
Daniel Prokesch
Publikationsdatum
23.02.2018
Verlag
Springer US
Erschienen in
Real-Time Systems / Ausgabe 2/2018
Print ISSN: 0922-6443
Elektronische ISSN: 1573-1383
DOI
https://doi.org/10.1007/s11241-018-9300-4

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