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Wireless Networks
Erschienen in: Wireless Networks 6/2019

21.02.2019

A fault-tolerant and congestion-aware architecture for wireless networks-on-chip

verfasst von: Seyed Hassan Mortazavi, Reza Akbar, Farshad Safaei, Amin Rezaei

Erschienen in: Wireless Networks | Ausgabe 6/2019

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Abstract

The combination of traditional wired links for regular transmissions and express wireless paths for long distance communications is a promising solution to prevent multi-hop network delays. In wireless network-on-chip technology, wireless-equipped routers are more error-prone than the conventional ones not only because of their implementation complexities but also due to their relatively high utilization. In this paper, a new topology is presented to enhance the network reliability, and then a novel routing algorithm is proposed to tolerate both intermittent and permanent faults on wireless hubs. In the proposed approach, once a wireless hub becomes faulty, the best alternative adjustment hub will be indicated and all the packets that have high average hop-count are routed through this alternative hub. In comparison with the state-of-the-art works, the proposed approach shows significant improvements in terms of robustness, congestion management, and resilience.
Vorheriger Artikel New dual-game-based cooperative bandwidth control scheme for ultra-dense networks
Nächster Artikel NMR inspired energy efficient protocol for heterogeneous wireless sensor network

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Metadaten
Titel
A fault-tolerant and congestion-aware architecture for wireless networks-on-chip
verfasst von
Seyed Hassan Mortazavi
Reza Akbar
Farshad Safaei
Amin Rezaei
Publikationsdatum
21.02.2019
Verlag
Springer US
Erschienen in
Wireless Networks / Ausgabe 6/2019
Print ISSN: 1022-0038
Elektronische ISSN: 1572-8196
DOI
https://doi.org/10.1007/s11276-019-01962-3

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