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Erschienen in: Journal of Computational Electronics 2/2016

07.03.2016

A novel double-gate SOI MOSFET to improve the floating body effect by dual SiGe trench

verfasst von: Ali A. Orouji, Atefeh Rahimifar, Mohammad Jozi

Erschienen in: Journal of Computational Electronics | Ausgabe 2/2016

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Abstract

In short-channel silicon-on-insulator metal-oxide-semiconductor transistors (SOI MOSFETs) the high electric field near the drain increases the floating-body effect. The aim of this article is to introduce a novel structure that reduces the electric field near the drain, so improving the floating-body effect. In the proposed structure, a dual trench is created in the buried oxide exactly under the junctions of drain/source and channel and is filled with an n-type SiGe material. The dual trench regions absorb the electric field lines and hence, the electric characteristic significantly improve. The proposed structure is named as dual SiGe trench double gate SOI MOSFET. In addition, we observe a considerable improvement in self-heating effects due to the higher thermal conductivity of SiGe in comparison with silicon dioxide.

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Literatur
1.
Zurück zum Zitat Celler, G.K., Cristoloveanu, S.: Frontiers of silicon-on-insulator. J. Appl. Phys. 93(2), 4955–4978 (2003)CrossRef Celler, G.K., Cristoloveanu, S.: Frontiers of silicon-on-insulator. J. Appl. Phys. 93(2), 4955–4978 (2003)CrossRef
2.
Zurück zum Zitat Kuo, J.B.: Low-Voltage SOI CMOS VLSI Devices and Circuits, 1st edn, pp. 4–5. Wiley, New York (2001) Kuo, J.B.: Low-Voltage SOI CMOS VLSI Devices and Circuits, 1st edn, pp. 4–5. Wiley, New York (2001)
3.
Zurück zum Zitat Arnold, E.: Silicon-on-lnsulator devices for high voltage and power IC applications. J. Electrochem. Soc. 141(7), 1983–1988 (1994)CrossRef Arnold, E.: Silicon-on-lnsulator devices for high voltage and power IC applications. J. Electrochem. Soc. 141(7), 1983–1988 (1994)CrossRef
4.
Zurück zum Zitat Vasileska, D., Raleva, K., Goodnick, S.M.: Modeling heating effects in nanoscale devices: the present and the future. J. Comput. Electron. 7(2), 67–75 (2008)CrossRef Vasileska, D., Raleva, K., Goodnick, S.M.: Modeling heating effects in nanoscale devices: the present and the future. J. Comput. Electron. 7(2), 67–75 (2008)CrossRef
5.
Zurück zum Zitat Ning, T.H., Cook, P.W., Dennard, R.H., Schuster, C.M., Yu, H.N.: 1 \(\mu \)m MOSFET VLSI technology: Part IV—Hot-electron design constraints. IEEE Trans. Electron Devices ED–26(4), 346–353 (1979)CrossRef Ning, T.H., Cook, P.W., Dennard, R.H., Schuster, C.M., Yu, H.N.: 1 \(\mu \)m MOSFET VLSI technology: Part IV—Hot-electron design constraints. IEEE Trans. Electron Devices ED–26(4), 346–353 (1979)CrossRef
6.
Zurück zum Zitat Narayanan, M.R., Al-Nashash, H., Dipankar, P.: Thermal model of MOSFET with SELBOX structure. J.Comput. Electron. 12, 803–811 (2013)CrossRef Narayanan, M.R., Al-Nashash, H., Dipankar, P.: Thermal model of MOSFET with SELBOX structure. J.Comput. Electron. 12, 803–811 (2013)CrossRef
7.
Zurück zum Zitat Valdinoci, M., Colalongo, L., Baccarani, G., Fortunato, G., Pecora, A., Policicchio, I.: Floating body effects in polysilicon thin-film transistors. IEEE Trans. Electron Devices 44, 2234–2241 (1997)CrossRef Valdinoci, M., Colalongo, L., Baccarani, G., Fortunato, G., Pecora, A., Policicchio, I.: Floating body effects in polysilicon thin-film transistors. IEEE Trans. Electron Devices 44, 2234–2241 (1997)CrossRef
8.
Zurück zum Zitat Orouji, Ali A., Mehrad, Mahsa: The best control of parasitic BJT effect in SOI-LDMOS with SiGe window under channel. IEEE Trans. Electron Devices 59(2), 419–425 (2012) Orouji, Ali A., Mehrad, Mahsa: The best control of parasitic BJT effect in SOI-LDMOS with SiGe window under channel. IEEE Trans. Electron Devices 59(2), 419–425 (2012)
9.
Zurück zum Zitat Yoo, J.S., Kim, C.H., Lee, M.C., Han, M.K., Kim, H.J.: Reliability of low temperature poly-Si TFT employing counter-doped lateral body terminal. In: IEDM Technical Digest, pp. 217–220 (2000) Yoo, J.S., Kim, C.H., Lee, M.C., Han, M.K., Kim, H.J.: Reliability of low temperature poly-Si TFT employing counter-doped lateral body terminal. In: IEDM Technical Digest, pp. 217–220 (2000)
10.
Zurück zum Zitat Chan, M., Yu, B., Ma, Z.J., Nguyen, C.T., Hu, C., Ko, P.K.: Comparative study of fully depleted and body-grounded non fully depleted SOI MOSFETs for high performance analog and mixed signal circuits. IEEE Trans. Electron Devices 42, 1975–1981 (1995)CrossRef Chan, M., Yu, B., Ma, Z.J., Nguyen, C.T., Hu, C., Ko, P.K.: Comparative study of fully depleted and body-grounded non fully depleted SOI MOSFETs for high performance analog and mixed signal circuits. IEEE Trans. Electron Devices 42, 1975–1981 (1995)CrossRef
11.
Zurück zum Zitat Sleight, J.W., Mistry, K.R., Trans, I.E.E.E.: DC and transient characterization of a compact Schottky body contact technology for SOI transistors. IEEE Trans. Electron Devices 46, 1451–1456 (1999)CrossRef Sleight, J.W., Mistry, K.R., Trans, I.E.E.E.: DC and transient characterization of a compact Schottky body contact technology for SOI transistors. IEEE Trans. Electron Devices 46, 1451–1456 (1999)CrossRef
12.
Zurück zum Zitat Lu, H., Andre, C., Salama, T.: A 2 GHz, 60 V-Class, SOI power LDMOSFET for base station applications. In: Proceedings of the IEEE 15th International Symposium on ISPSD, pp. 270–273 (2003) Lu, H., Andre, C., Salama, T.: A 2 GHz, 60 V-Class, SOI power LDMOSFET for base station applications. In: Proceedings of the IEEE 15th International Symposium on ISPSD, pp. 270–273 (2003)
13.
Zurück zum Zitat Anvarifard, Mohammad K., Orouji, Ali A.: Improvement of electrical properties in a novel partially depleted SOI MOSFET with emphasizing on the hysteresis effect. IEEE Trans. Electron Devices 60(10), 3310–3317 (2013)CrossRef Anvarifard, Mohammad K., Orouji, Ali A.: Improvement of electrical properties in a novel partially depleted SOI MOSFET with emphasizing on the hysteresis effect. IEEE Trans. Electron Devices 60(10), 3310–3317 (2013)CrossRef
14.
Zurück zum Zitat ATLAS User’s Manual: 2-D Device Simulator. SILVACO International, Austin (2012) ATLAS User’s Manual: 2-D Device Simulator. SILVACO International, Austin (2012)
15.
Zurück zum Zitat Kumar, Mirgender, Dubey, Sarvesh, Tiwari, Pramod Kumar, Jit, S.: Analytical modeling and simulation of subthreshold characteristics of back-gated SSGOI and SSOI MOSFETs: a comparative study. Curr. Appl. Phys. 13, 1778–1786 (2013)CrossRef Kumar, Mirgender, Dubey, Sarvesh, Tiwari, Pramod Kumar, Jit, S.: Analytical modeling and simulation of subthreshold characteristics of back-gated SSGOI and SSOI MOSFETs: a comparative study. Curr. Appl. Phys. 13, 1778–1786 (2013)CrossRef
Metadaten
Titel
A novel double-gate SOI MOSFET to improve the floating body effect by dual SiGe trench
verfasst von
Ali A. Orouji
Atefeh Rahimifar
Mohammad Jozi
Publikationsdatum
07.03.2016
Verlag
Springer US
Erschienen in
Journal of Computational Electronics / Ausgabe 2/2016
Print ISSN: 1569-8025
Elektronische ISSN: 1572-8137
DOI
https://doi.org/10.1007/s10825-016-0801-x

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