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Journal of Electronic Testing
Erschienen in: Journal of Electronic Testing 3/2011

01.06.2011

Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures

verfasst von: Manuel J. Barragán, Rafaella Fiorelli, Gildas Leger, Adoración Rueda, José L. Huertas

Erschienen in: Journal of Electronic Testing | Ausgabe 3/2011

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Abstract

This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (LNAs). It is based on the detection and analysis of the response envelope of the Device Under Test (DUT) to a two-tone input signal. The envelope signal is processed to obtain a digital signature sensitive to key specifications of the DUT. An optimized regression model based on ensemble learning is used to relate the digital signatures to the target specifications. A new Figure of Merit (FOM) is proposed to evaluate the prediction accuracy of the statistical model, and a demonstrator has been developed to prove the feasibility of the approach. This demonstrator features a 2.445 GHz low-power LNA and a simple envelope detector, and has been developed in a 90 nm CMOS technology. Post-layout simulations are provided to verify the functionality of the proposed test technique.
Vorheriger Artikel RFID System On-line Testing Based on the Evaluation of the Tags Read-Error-Rate
Nächster Artikel A Level-Crossing Approach for the Analysis of RF Modulated Signals Using Only Digital Test Resources

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1
Unfortunately, it is not possible to thoroughly describe the performance of each model in a single journal article. The interested reader can refer to [16] for a deeper insight.
 
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Metadaten
Titel
Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures
verfasst von
Manuel J. Barragán
Rafaella Fiorelli
Gildas Leger
Adoración Rueda
José L. Huertas
Publikationsdatum
01.06.2011
Verlag
Springer US
Erschienen in
Journal of Electronic Testing / Ausgabe 3/2011
Print ISSN: 0923-8174
Elektronische ISSN: 1573-0727
DOI
https://doi.org/10.1007/s10836-010-5193-4

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