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Erschienen in: Journal of Computational Electronics 3/2017

09.06.2017

Controlling ambipolarity with improved RF performance by drain/gate work function engineering and using high \(\kappa \) dielectric material in electrically doped TFET: proposal and optimization

verfasst von: Shivendra Yadav, Dheeraj Sharma, Deepak Soni, Mohd. Aslam

Erschienen in: Journal of Computational Electronics | Ausgabe 3/2017

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Abstract

This article proposes a novel device structure of electrically doped tunnel FET with drain/gate work function engineering by using hetero-dielectric material for the suppression of ambipolar behavior with improved DC and RF characteristics. For this, a P–I–N type structure was formed over an intrinsic silicon wafer by applying negative and positive voltages to create source and drain regions, respectively. Formation of source and drain regions by the concept of electrical doping is useful for reduction of random doping fluctuations and fabrication complexity. For suppression of ambipolar behaviour, the drain electrode is split into two different metal work functions (\(\phi _\mathrm{DE1}\) < \(\phi _\mathrm{DE2}\)), which alters the carrier concentration and increases the tunneling barrier at the drain/channel interface. Consequently, the proposed modification in terms of dual work functionality at the drain terminal offers better performance in terms of suppression of negative conductance (ambipolar current) and parasitic capacitances. However, the presence of dual work functionality at the drain electrode causes degradation in ON-state current and RF figures of merit. To resolve these problems, the control gate electrode is further split into two different work functions and uses hetero gate dielectric material, where the gate work function near the source/channel interface is greater than the gate work function near the drain/channel interface. It assists tunneling of carriers at the source/channel junction and improves ON-state current with RF performance. Apart from this, the use of hetero gate dielectric material provides further enhancement in DC and high frequency behaviour of the device.

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Literatur
1.
Zurück zum Zitat Ionescu, A.M., Riel, H.: Tunnel field-effect transistors as energy-efficient electronic switches. Nature/em 479(7373), 329–337 (2010)CrossRef Ionescu, A.M., Riel, H.: Tunnel field-effect transistors as energy-efficient electronic switches. Nature/em 479(7373), 329–337 (2010)CrossRef
2.
Zurück zum Zitat Choi, W.Y., Park, B.-G., Lee, J.D., Liu, T.-J.K.: Tunneling field-effect transistor (TFETs) with subthreshold swing (SS) less than 60 mV/Dec. IEEE Electron Device Lett. 28(8), 743–745 (2007)CrossRef Choi, W.Y., Park, B.-G., Lee, J.D., Liu, T.-J.K.: Tunneling field-effect transistor (TFETs) with subthreshold swing (SS) less than 60 mV/Dec. IEEE Electron Device Lett. 28(8), 743–745 (2007)CrossRef
3.
Zurück zum Zitat Koswatta, S.O., Lundstrom, M.S., Nikonov, D.E.: Performance comparison between p–i–n tunneling transistors and conventional MOSFETs. IEEE Trans. Electron Devices 56(3), 456–465 (2007)CrossRef Koswatta, S.O., Lundstrom, M.S., Nikonov, D.E.: Performance comparison between p–i–n tunneling transistors and conventional MOSFETs. IEEE Trans. Electron Devices 56(3), 456–465 (2007)CrossRef
4.
Zurück zum Zitat Damrongplasit, N., Shin, C., Kim, S.H., Vega, R.A., Liu, T.J.K.: Study of random dopant fluctuation effects in germanium-source tunnel FETs. IEEE Trans. Electron Devices 58(10), 3541–3548 (2011)CrossRef Damrongplasit, N., Shin, C., Kim, S.H., Vega, R.A., Liu, T.J.K.: Study of random dopant fluctuation effects in germanium-source tunnel FETs. IEEE Trans. Electron Devices 58(10), 3541–3548 (2011)CrossRef
5.
Zurück zum Zitat Chiang, M.-H., Lin, J.-N., Kim, K., Chuang, C.-T.: Random dopant fluctuation in limited-width FinFET technologies. IEEE Trans. Electron Devices 54(8), 2055–2060 (2007)CrossRef Chiang, M.-H., Lin, J.-N., Kim, K., Chuang, C.-T.: Random dopant fluctuation in limited-width FinFET technologies. IEEE Trans. Electron Devices 54(8), 2055–2060 (2007)CrossRef
6.
Zurück zum Zitat Royer, C.L., Mayer, F.: Exhaustive experimental study of tunnel field effect transistors (TFETs): from materials to architecture. In: Proceedings of the 10th International Conference Ultimate Integration of Silicon, pp. 53–56. (2009) Royer, C.L., Mayer, F.: Exhaustive experimental study of tunnel field effect transistors (TFETs): from materials to architecture. In: Proceedings of the 10th International Conference Ultimate Integration of Silicon, pp. 53–56. (2009)
7.
Zurück zum Zitat Jhaveri, R., Nagavarapu, V., Woo, J.C.S.: Effect of pocket doping and annealing schemes on the source-pocket tunnel field-effect transistor. IEEE Trans. Electron Devices 58(1), 80–86 (2011)CrossRef Jhaveri, R., Nagavarapu, V., Woo, J.C.S.: Effect of pocket doping and annealing schemes on the source-pocket tunnel field-effect transistor. IEEE Trans. Electron Devices 58(1), 80–86 (2011)CrossRef
8.
Zurück zum Zitat Damrongplasit, N., Kim, S.H., Liu, T.-J.K.: Study of random dopant fluctuation induced variability in the raised-Ge-source TFET. IEEE Electron Device Lett. 34(2), 184–186 (2013)CrossRef Damrongplasit, N., Kim, S.H., Liu, T.-J.K.: Study of random dopant fluctuation induced variability in the raised-Ge-source TFET. IEEE Electron Device Lett. 34(2), 184–186 (2013)CrossRef
9.
Zurück zum Zitat Nadda, K., Kumar, M.J.: Thin-film bipolar transistors on recrystallized polycrystalline silicon without impurity doped junctions: proposal and investigation. J. Disp. Technol. 10(7), 590–594 (2014)CrossRef Nadda, K., Kumar, M.J.: Thin-film bipolar transistors on recrystallized polycrystalline silicon without impurity doped junctions: proposal and investigation. J. Disp. Technol. 10(7), 590–594 (2014)CrossRef
10.
Zurück zum Zitat Kumar, M.J., Nadda, K.: Bipolar charge-plasma transistor: a novel three terminal device. IEEE Trans. Electron Devices 59(4), 962–967 (2012)CrossRef Kumar, M.J., Nadda, K.: Bipolar charge-plasma transistor: a novel three terminal device. IEEE Trans. Electron Devices 59(4), 962–967 (2012)CrossRef
11.
Zurück zum Zitat Ghosh, B., Akram, M.W.: Junctionless tunnel field effect transistor. IEEE Electron Device Lett. 34(5), 584–586 (2013)CrossRef Ghosh, B., Akram, M.W.: Junctionless tunnel field effect transistor. IEEE Electron Device Lett. 34(5), 584–586 (2013)CrossRef
12.
Zurück zum Zitat Nigam, K., Kondekar, P., Sharma, D.: A new approach for design and investigation of junction-less tunnel FET using electrically doped mechanism. Superlattices Microstruct. 98(5), 1–7 (2016)CrossRef Nigam, K., Kondekar, P., Sharma, D.: A new approach for design and investigation of junction-less tunnel FET using electrically doped mechanism. Superlattices Microstruct. 98(5), 1–7 (2016)CrossRef
13.
Zurück zum Zitat Gundapaneni, S., Bajaj, M., Pandey, R.K., Murali, K.V.R., Ganguly, S., Kottantharayil, A.: Effect of band-to-band tunneling on junctionless transistors. IEEE Trans. Electron Devices 59(4), 1023–1029 (2012)CrossRef Gundapaneni, S., Bajaj, M., Pandey, R.K., Murali, K.V.R., Ganguly, S., Kottantharayil, A.: Effect of band-to-band tunneling on junctionless transistors. IEEE Trans. Electron Devices 59(4), 1023–1029 (2012)CrossRef
14.
Zurück zum Zitat Colinge, J.-P., Lee, C.-W., Afzalian, A., Akhavan, N.D., Yan, R., Ferain, I., Razavi, P.: Nanowire transistors without junctions. Nat. Nanotechnol. 5(3), 225–229 (2010)CrossRef Colinge, J.-P., Lee, C.-W., Afzalian, A., Akhavan, N.D., Yan, R., Ferain, I., Razavi, P.: Nanowire transistors without junctions. Nat. Nanotechnol. 5(3), 225–229 (2010)CrossRef
15.
Zurück zum Zitat Kumar, M., Jit, S.: Effects of electrostatically doped source/drain and ferroelectric gate oxide on subthreshold swing and impact ionization rate of strained-Si-on-insulator tunnel field-effect transistors. IEEE Trans. Nanotechnol. 14(4), 597–599 (2015)CrossRef Kumar, M., Jit, S.: Effects of electrostatically doped source/drain and ferroelectric gate oxide on subthreshold swing and impact ionization rate of strained-Si-on-insulator tunnel field-effect transistors. IEEE Trans. Nanotechnol. 14(4), 597–599 (2015)CrossRef
16.
Zurück zum Zitat Lahgere, A.: Electrically doped dynamically configurable field-effect transistor for low-power and high-performance applications. Electron. Lett. 51(16), 1284–1286 (2015)CrossRef Lahgere, A.: Electrically doped dynamically configurable field-effect transistor for low-power and high-performance applications. Electron. Lett. 51(16), 1284–1286 (2015)CrossRef
17.
Zurück zum Zitat Lahgere, A., Sahu, C., Singh, J.: PVT-aware design of dopingless dynamically configurable tunnel FET. IEEE Trans. Electron Devices 62(8), 2404–2409 (2015)CrossRef Lahgere, A., Sahu, C., Singh, J.: PVT-aware design of dopingless dynamically configurable tunnel FET. IEEE Trans. Electron Devices 62(8), 2404–2409 (2015)CrossRef
18.
Zurück zum Zitat Nigam, K., Kondekar, P.: DC characteristics and analog/RF performance of novel polarity control GaAs-Ge based tunnel field effect transistor. Superlattices Microstruct. 92, 224–231 (2016)CrossRef Nigam, K., Kondekar, P.: DC characteristics and analog/RF performance of novel polarity control GaAs-Ge based tunnel field effect transistor. Superlattices Microstruct. 92, 224–231 (2016)CrossRef
19.
Zurück zum Zitat Kumar, M.J., Janardhanan, S.: Doping-less tunnel field effect transistor: design and investigation. IEEE Trans. Electron Devices 60(10), 3285–3290 (2013)CrossRef Kumar, M.J., Janardhanan, S.: Doping-less tunnel field effect transistor: design and investigation. IEEE Trans. Electron Devices 60(10), 3285–3290 (2013)CrossRef
20.
Zurück zum Zitat Boucart, K., Ionescu, A.M.: Double-gate tunnel FET with high-k gate dielectric. IEEE Trans. Electron Devices 54(7), 1725–1733 (2007)CrossRef Boucart, K., Ionescu, A.M.: Double-gate tunnel FET with high-k gate dielectric. IEEE Trans. Electron Devices 54(7), 1725–1733 (2007)CrossRef
21.
Zurück zum Zitat Ahish, S., Sharma, D., Kumar, Y.B.N., Vasantha, M.H.: Performance enhancement of novel InAs/Si hetero double-gate tunnel FET using Gaussian doping. IEEE Trans. Electron Devices 63(1), 288–295 (2016)CrossRef Ahish, S., Sharma, D., Kumar, Y.B.N., Vasantha, M.H.: Performance enhancement of novel InAs/Si hetero double-gate tunnel FET using Gaussian doping. IEEE Trans. Electron Devices 63(1), 288–295 (2016)CrossRef
22.
Zurück zum Zitat Raad, B.R., Sharma, D., Kondekar, P.: Dual workfunction tunnel field-effect transistor with shifted gate for ambipolar suppression and ON current improvement. In: IEEE, ICCTICT. (2016) Raad, B.R., Sharma, D., Kondekar, P.: Dual workfunction tunnel field-effect transistor with shifted gate for ambipolar suppression and ON current improvement. In: IEEE, ICCTICT. (2016)
23.
Zurück zum Zitat Nigam, K., Pandey, S.: Temperature sensitivity analysis of polarity controlled electrostatically doped tunnel field-effect transistor. Superlattices Microstruct. 97, 598–605 (2016)CrossRef Nigam, K., Pandey, S.: Temperature sensitivity analysis of polarity controlled electrostatically doped tunnel field-effect transistor. Superlattices Microstruct. 97, 598–605 (2016)CrossRef
24.
Zurück zum Zitat ATLAS Device Simulation Software. Silvaco Int., Santa Clara (2014) ATLAS Device Simulation Software. Silvaco Int., Santa Clara (2014)
25.
Zurück zum Zitat Goswami, Y., Ghosh, B., Asthana, P.K.: Analog performance of Si junctionless tunnel field effect transistor and its improvisation using II–IV semiconductor. R. Soc. Chem. 4, 10761–10765 (2014) Goswami, Y., Ghosh, B., Asthana, P.K.: Analog performance of Si junctionless tunnel field effect transistor and its improvisation using II–IV semiconductor. R. Soc. Chem. 4, 10761–10765 (2014)
26.
Zurück zum Zitat Asthana, P.K., Ghosh, B., Goswami, Y., Tripathi, B.M.M.: High-speed and low-power ultradeep-submicrometer IIIV heterojunctionless tunnel field-effect transistor. IEEE Trans. Electron Devices 61(2), 479–486 (2014)CrossRef Asthana, P.K., Ghosh, B., Goswami, Y., Tripathi, B.M.M.: High-speed and low-power ultradeep-submicrometer IIIV heterojunctionless tunnel field-effect transistor. IEEE Trans. Electron Devices 61(2), 479–486 (2014)CrossRef
27.
Zurück zum Zitat Wheeler, D., et al.: Deposition of HfO\(_{2}\) on InAs by atomic-layer deposition. Microelectron. Eng. 86, 1561–1563 (2009)CrossRef Wheeler, D., et al.: Deposition of HfO\(_{2}\) on InAs by atomic-layer deposition. Microelectron. Eng. 86, 1561–1563 (2009)CrossRef
28.
Zurück zum Zitat Ana, F., Najeeb-ud-din: Gate workfunction engineering for deep sub-micron MOSFETs: motivation, features and challenges. IJECT 2, 2230–9543 (2011) Ana, F., Najeeb-ud-din: Gate workfunction engineering for deep sub-micron MOSFETs: motivation, features and challenges. IJECT 2, 2230–9543 (2011)
29.
Zurück zum Zitat Hussain, M.M. et al.: Dual work function high-k/metal gate CMOS FinFETs. In: IEEE Conference. (2007) Hussain, M.M. et al.: Dual work function high-k/metal gate CMOS FinFETs. In: IEEE Conference. (2007)
30.
Zurück zum Zitat Lin, R., Lu, Q., Ranade, P., King, T.-J., Hu, C.: An adjustable workfunction technology using Mo gate for CMOS devices. IEEE Electron Device Lett. 23(1), 4951 (2002)CrossRef Lin, R., Lu, Q., Ranade, P., King, T.-J., Hu, C.: An adjustable workfunction technology using Mo gate for CMOS devices. IEEE Electron Device Lett. 23(1), 4951 (2002)CrossRef
31.
Zurück zum Zitat Polishchuk, I., Ranade, P., King, T.-J., Chenming, H.: Dual work function metal gate CMOS transistors by NiTi interdiffusion. IEEE Electron Device Lett. 23(4), 200–202 (2002) Polishchuk, I., Ranade, P., King, T.-J., Chenming, H.: Dual work function metal gate CMOS transistors by NiTi interdiffusion. IEEE Electron Device Lett. 23(4), 200–202 (2002)
32.
Zurück zum Zitat Cho, S., Lee, J.S., Kim, K.R., Park, B.G., Harris, J.S., Kang, I.M.: Analyses on small-signal parameters and radio-frequency modeling of gate-all-around tunneling field-effect transistors. IEEE Trans. Electron Devices 58(12), 4164–4171 (2011)CrossRef Cho, S., Lee, J.S., Kim, K.R., Park, B.G., Harris, J.S., Kang, I.M.: Analyses on small-signal parameters and radio-frequency modeling of gate-all-around tunneling field-effect transistors. IEEE Trans. Electron Devices 58(12), 4164–4171 (2011)CrossRef
33.
Zurück zum Zitat Yang, Y., Tong, X., Yang, L.T., Guo, P.-F., Fan, L., Yeo, Y.-C.: Tunneling field-effect transistor: capacitance components and modeling. IEEE Electron Device Lett. 31(7), 752–754 (2010)CrossRef Yang, Y., Tong, X., Yang, L.T., Guo, P.-F., Fan, L., Yeo, Y.-C.: Tunneling field-effect transistor: capacitance components and modeling. IEEE Electron Device Lett. 31(7), 752–754 (2010)CrossRef
34.
Zurück zum Zitat Singh, M., Mishra, S., Mohanty, S.S., Mishra, G.P.: Performance analysis of SOI MOSFET with rectangular recessed channel. Adv. Nat. Sci. Nanosci. Nanotechnol. 7(1), 8 (2016)CrossRef Singh, M., Mishra, S., Mohanty, S.S., Mishra, G.P.: Performance analysis of SOI MOSFET with rectangular recessed channel. Adv. Nat. Sci. Nanosci. Nanotechnol. 7(1), 8 (2016)CrossRef
35.
Zurück zum Zitat Madan, J., Chaujar, R.: Interfacial charge analysis of heterogeneous gate dielectric-gate all around-tunnel FET for improved device reliability. IEEE Trans. Device Mater. Reliab. 16(2), 227–234 (2016)CrossRef Madan, J., Chaujar, R.: Interfacial charge analysis of heterogeneous gate dielectric-gate all around-tunnel FET for improved device reliability. IEEE Trans. Device Mater. Reliab. 16(2), 227–234 (2016)CrossRef
Metadaten
Titel
Controlling ambipolarity with improved RF performance by drain/gate work function engineering and using high dielectric material in electrically doped TFET: proposal and optimization
verfasst von
Shivendra Yadav
Dheeraj Sharma
Deepak Soni
Mohd. Aslam
Publikationsdatum
09.06.2017
Verlag
Springer US
Erschienen in
Journal of Computational Electronics / Ausgabe 3/2017
Print ISSN: 1569-8025
Elektronische ISSN: 1572-8137
DOI
https://doi.org/10.1007/s10825-017-1019-2

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