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Erschienen in: Wireless Personal Communications 3/2014

01.06.2014

Mobile DDR IO Standard Based High Performance Energy Efficient Portable ALU Design on FPGA

verfasst von: Tanesh Kumar, Bishwajeet Pandey, Teerath Das, B. S. Chowdhry

Erschienen in: Wireless Personal Communications | Ausgabe 3/2014

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Abstract

In this work, we are making energy efficient ALU using the most energy efficient LVCMOS IO standard for the highest frequency of i7 processor. It is observed that LVCMOS12 is the most energy efficient than all available LVCMOS having 26.23, 58.37 and 75.65 % less IO power reduction than LVCMOS18, LVCMOS25 and LVCMOS33 respectively at 1 GHz. Then we are making this ALU portable using MOBILE DDR IO standard in place of default LVCMOS33 IO standard which we use in traditional ALU. As we replace LVCMOS with MOBILE DDR, we are achieving 69.07 % portability in terms of IO power and 29.36 % in terms of Leakage power at 2.9 GHz. In next stage, we try to enhance the performance of ALU with MOBILE DDR but not beyond the power consumption with LVCMOS. In that way, we achieve the highest frequency of 12 GHz with MOBILE DDR. That was earlier possible for 3.8 GHz 64-bit ALU using CMOS. In this HDL based implementation of 64-bit ALU on FPGA, Kintex-7 FPGA is used with XC7K70T device and FBG676 package is used.

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Literatur
1.
Zurück zum Zitat Sharma, M., Sharma, K. G., Sharma, T., Singh, B. P., & Arora. N. (2011). SET D-flip flop design for portable applications. iN IEEE India international conference on power electronics (IICPE) (pp. 1–5). Sharma, M., Sharma, K. G., Sharma, T., Singh, B. P., & Arora. N. (2011). SET D-flip flop design for portable applications. iN IEEE India international conference on power electronics (IICPE) (pp. 1–5).
2.
Zurück zum Zitat Panda, P. R., Silpa, B. V. N., Shrivastava, A., & Gummidipudi, K. (2010). Power-efficient system design. Springer Press, 253 p, ISBN 978-1-4419-6388-8. Panda, P. R., Silpa, B. V. N., Shrivastava, A., & Gummidipudi, K. (2010). Power-efficient system design. Springer Press, 253 p, ISBN 978-1-4419-6388-8.
3.
Zurück zum Zitat Maurice, M., & Gyvez, J. P. (2008). Technological boundaries of voltage and frequency scaling for power performance tuning. Springer Integrated Circuits and Systems, ISBN 978-1-4419-4553-2. Maurice, M., & Gyvez, J. P. (2008). Technological boundaries of voltage and frequency scaling for power performance tuning. Springer Integrated Circuits and Systems, ISBN 978-1-4419-4553-2.
4.
Zurück zum Zitat Morris, John. (2003). Reconfigurable logic: A saviour for experimental computer architecture research. Lecture Notes in Computer Science, 2823, 69–78.CrossRef Morris, John. (2003). Reconfigurable logic: A saviour for experimental computer architecture research. Lecture Notes in Computer Science, 2823, 69–78.CrossRef
5.
Zurück zum Zitat Hui, L., & Ding, L. W. (2010). Low-power and portable design of bioelectrical impedance measurement system. In WASE international conference on information engineering (ICIE) (Vol. 3, pp. 38–41). Hui, L., & Ding, L. W. (2010). Low-power and portable design of bioelectrical impedance measurement system. In WASE international conference on information engineering (ICIE) (Vol. 3, pp. 38–41).
6.
Zurück zum Zitat Gosset, G., & Flandre, D. (2011). Fully-automated and portable design methodology for optimal sizing of energy-efficient CMOS voltage rectifiers. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 1(2), 141–149.CrossRef Gosset, G., & Flandre, D. (2011). Fully-automated and portable design methodology for optimal sizing of energy-efficient CMOS voltage rectifiers. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 1(2), 141–149.CrossRef
7.
Zurück zum Zitat Paganini, M., Kimmich, G., Ducrey, S., Caubit, G., & Coeffe, V. (2007). Portable multimedia SoC design: A global challenge. In Design, automation and test in Europe conference and exhibition, DATE ’07 (pp. 1–4). Paganini, M., Kimmich, G., Ducrey, S., Caubit, G., & Coeffe, V. (2007). Portable multimedia SoC design: A global challenge. In Design, automation and test in Europe conference and exhibition, DATE ’07 (pp. 1–4).
8.
Zurück zum Zitat Pandey, B., Yadav, J., Singh, Y., Kumar, R., & Patel, S. (2013). Energy efficient design and implementation of ALU on 40-nm FPGA. In IEEE international conference on energy efficient technologies for sustainability-(ICEETs). Nagercoil, Tamilnadu, April 10–12. Pandey, B., Yadav, J., Singh, Y., Kumar, R., & Patel, S. (2013). Energy efficient design and implementation of ALU on 40-nm FPGA. In IEEE international conference on energy efficient technologies for sustainability-(ICEETs). Nagercoil, Tamilnadu, April 10–12.
9.
Zurück zum Zitat Kim, S. H. (2007). A low power and highly reliable 400 Mbps mobile DDR SDRAM with on-chip distributed ECC. In IEEE Asian solid-state circuits conference (pp. 34–37). Kim, S. H. (2007). A low power and highly reliable 400 Mbps mobile DDR SDRAM with on-chip distributed ECC. In IEEE Asian solid-state circuits conference (pp. 34–37).
10.
Zurück zum Zitat Marraa, L. et al. (2008). Experimental analysis of energy consumption by MobileDDR memory for mobile applications. In IEEE international symposium on industrial electronics (pp. 1686–1691). Marraa, L. et al. (2008). Experimental analysis of energy consumption by MobileDDR memory for mobile applications. In IEEE international symposium on industrial electronics (pp. 1686–1691).
Metadaten
Titel
Mobile DDR IO Standard Based High Performance Energy Efficient Portable ALU Design on FPGA
verfasst von
Tanesh Kumar
Bishwajeet Pandey
Teerath Das
B. S. Chowdhry
Publikationsdatum
01.06.2014
Verlag
Springer US
Erschienen in
Wireless Personal Communications / Ausgabe 3/2014
Print ISSN: 0929-6212
Elektronische ISSN: 1572-834X
DOI
https://doi.org/10.1007/s11277-014-1725-z

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