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Erschienen in:
IoT: Bird’s Eye View, Megatrends and Perspectives Kapitel lesen Erstes Kapitel lesen

2017 | OriginalPaper | Buchkapitel

6. On-Chip Non-volatile Memory for Ultra-Low Power Operation

verfasst von : Meng-Fan Chang

Erschienen in: Enabling the Internet of Things

Verlag: Springer International Publishing

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Abstract

This chapter addresses trends and challenges in the development of on-chip (embedded) non-volatile memory (NVM) for ultra-low power operation. Various NVM technologies have been introduced, including Flash, OTP/MTP, resistive RAM, and phase-change memory (PCM). In the following, we examine some of the challenges in the design of circuits used for read and write operations. Future trends in ultra-low-power NVM are also discussed.

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Vorheriges Kapitel Energy Efficient Volatile Memory Circuits for the IoT Era
Nächstes Kapitel On-Chip Non-volatile STT-MRAM for Zero-Standby Power
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Metadaten
Titel
On-Chip Non-volatile Memory for Ultra-Low Power Operation
verfasst von
Meng-Fan Chang
Copyright-Jahr
2017
Buch
Enabling the Internet of Things

Print ISBN: 978-3-319-51480-2

Electronic ISBN: 978-3-319-51482-6

Copyright-Jahr: 2017

DOI
https://doi.org/10.1007/978-3-319-51482-6_6

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