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2018 | OriginalPaper | Buchkapitel

4. Semiconductors

verfasst von : Bradley D. Fahlman

Erschienen in: Materials Chemistry

Verlag: Springer Netherlands

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Abstract

Our technologically advanced way of life would not be possible without the semiconductor industry. The first semiconductor device, known as a transistor, was discovered at Bell Labs in the late 1940s and was widely used shortly thereafter for radio electronics. Today, transistors are still pervasive in every chip that lies at the heart of portable electronic devices, modes of transportation, and computers. In fact, modern computer chips now contain over 10 billion individual transistors—all on a surface that is smaller than a fingernail!

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Vorheriges Kapitel Metals

Nächstes Kapitel Polymeric Materials

http://ece-www.colorado.edu/~bart/book/book/chapter2/ch2_8.htm

Hemlock Semiconductor homepage: http://www.hscpoly.com

For example, see: (a) Sanjurjo, A. U.S. Patent 5006317. (b) Yoon, P.; Song, Y. U.S. Patent 4786477. (c) Boone, J. E.; Owens, D. W.; Farritor, R. E.; Blank, W. D. U.S. Patent 4806317.

Homoepitaxial growth refers to growing a film onto an atomically-flat substrate, wherein both film and substrate are compositionally equivalent. In contrast, heteroepitaxial growth would refer to growing a thin film of different composition onto a substrate (e.g., GaAs thin film on a Si substrate). Such film growth occurs usually by vapor-phase techniques, which facilitates exact lattice matching of the crystal orientation and spacing of the growing thin film with the underlying substrate.

The 24-core AMD EPYC 7401P server CPU currently contains the largest number of transistors: 19.2 billion on a chip area of 195 mm²! However, commercial CPU chips, such as the Core i7 (355 mm²) contains around 3.2 billion transistors; the Apple A11 Bionic (87.66 mm²), contains 4.1 billion transistors. The latest graphics processing units (GPUs) contain significantly more transistors; for example, the GV100 Volta from Nvidia contains 21.1 billion transistors on a chip size of 815 mm². It should be noted that flash-memory chips have long featured over 1 billion transistors. Since 2005, 8 GB memory chips (146 mm²) have featured over 4 billion transistors, and the latest 512 GB SD cards are estimated to contain over 500 billion transistors!

An article that describes some possible strategies beyond Moore’s Law: http://www.economist.com/technology-quarterly/2016-03-12/after-moores-law

Although the current should, in theory, be zero for a reverse-bias diode, there will still be a very small number of electrons/holes with enough energy to overcome the large junction potential, resulting in a very small current.

Whereas it is easy to conceptualize the uphill movement of electrons due to an applied voltage that exceeds the junction potential, it is not as straight-forward to rationalize hole migration. That is, they will move downhill from p-n regions during forward bias. A picture that may help visualize this is to think of holes as helium-filled balloons that are adhered to a ceiling. Energy would be required in order to pull them down; having a larger balloon with more helium would require even more energy (analogous to reverse-bias), whereas a small balloon would be easier to pull down (forward bias).

The V _T is related to the difference in the work function (i.e., ϕ—the energy required to remove an electron from the surface of a material) between the gate and channel regions.

For a thorough description of the advantages and disadvantages of transistor scaling, see: (a) http://www-inst.eecs.berkeley.edu/~ee130/sp06/chp7full.pdf. (b) https://people.eecs.berkeley.edu/~tking/theses/bsriram.pdf

Due to its high solubility in silicon lattices, boron was commonly used as a dopant for the p-MOSFET, being implanted as B⁺ or BF₂ ⁺ ions. However, boron has a greater solubility in SiO₂, which results in diffusion from the polysilicon gate into the SiO₂ gate insulating layer and even into the silicon channel. These positive charges within the oxide and channel regions causes an increase in scattering, thus reducing the carrier mobility and on-current.

It should be noted that the “technology node” no longer refers to physical dimensions of the transistor, but is rather an industry term related to a new fabrication process every 2 years, in accord with Moore’s Law. By definition, the technology node refers to half the distance (half-pitch) between cells in a DRAM memory chip. It is noteworthy that the gate length, L, officially moved into the nanoregime in the year 2000.

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(a) http://www.soiconsortium.org/pdf/Consortium_9april09_final.pdf. (b) http://www.advancedsubstratenews.com/

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A detailed video of the Si(111) 7 × 7 reconstruction may be found at: http://www.vimeo.com/1086112

For more details, see: http://www.chem.qmul.ac.uk/surfaces/scc/

For GaAs substrates, primers such as xylene or trichlorobenzene are used, as GaAs is already a polar surface.

Masks are either comprised of soda-lime glass (coated with either a photographic emulsion, Fe₂O₃, or Cr films), or quartz (with a Cr film). Due to the absorption of UV light by glass, the latter is required for deep UV (DUV) photolithography. Masks may be classified as either “light-field” or “dark-field”; whereas the former is mostly clear with opaque patterns, the latter is an opaque mask, with transparent features.

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http://www.anandtech.com/show/10097/euv-lithography-makes-good-progress-still-not-ready-for-prime-time

The use of double- and triple-patterning has extended the 193-nm photolithography timeline beyond that originally anticipated. For more details on this technology, see: (a) http://www.semi.org/cms/groups/public/documents/web_content/ctr_030805.pdf. (b) Wu, B.; Singh, A. K. Extreme Ultraviolet Lithography, McGraw-Hill: New York, 2009 (page 5 of the Introduction has a lithography roadmap for the extension of 193-nm photolithography, and EUV not likely being instituted until the 22 or 16 nm node (ca. 2015+).

For more details regarding EUV, see: Hutcheson, G. D. et al. Scientific American 2004, 290, 76.

Hiroshi, I. Adv. Polym. Sci. 2005, 172, 37, and references therein.

(a) http://people.ccmr.cornell.edu/~cober/MiniPresentations/PAG_RBSPC.pdf. (b) Kim, K. -M.; Ayothi, R.; Ober, C. K. Polym. Bull. 2005, 55, 333.

For instance, see: (a) Dai, J.; Ober, C. K.; Wang, L.; Cerrina, F.; Nealey, P. F. Proc. SPIE - Int. Soc. Opt. Eng. 2002, 4690, 1193. (b) Kessel, C. R.; Boardman, L. D.; Rhyner, S. J.; Cobb, J. L.; Henderson, C. C.; Rao, V.; Okoroanyanwu, U. Proc. SPIE - Int. Soc. Opt. Eng. 1999, 3678, 214. (c) Bratton, D.; Yang, D.; Dai, J.; Ober, C. K. Polym. Adv. Technol. 2006, 17, 94, and references therein.

The depth of focus (DOF = λ/(NA)²) is also paramount toward resolution, as wafers are not atomically flat. Though it may be possible to adjust the wavelength and NA to achieve better resolution, the depth of field will decrease, making it difficult to define features simultaneously at the top and bottom surfaces. Consequently, chemical mechanical polishing (CMP) is used to planarize the wafer prior to high-resolution photolithography, and as thin a layer as possible of photoresist is applied to the wafer.

There are two methods used to remove the patterned material. Etching is where the photoresist is developed on top of the deposited layer. The underlying material is then removed by etching through openings in the mask. In contrast, lift-off is used when the material is deposited on top of the developed photoresist. The material is then lifted off when the resist is removed. For a nice summary of wet/dry etching, as well as etching vs. lift-off, see: http://www.mrsec.harvard.edu/education/ap298r2004/Erli%20chen%20Fabrication%20III%20-%20Etching.pdf

A plasma is considered the fourth class of matter, in addition to solids, liquids, and gases. A plasma contains a mixture of ground-state and excited-state atoms, as well as ions.

C. J. Mogab, A. C. Adams, and D. L. Flamm, J. Appl. Phys. 1978, 49(7), 3796.

As its name applies, chemical mechanical polishing/planarization utilizes a hybrid of chemical and mechanical forces to yield a flat surface. It should be noted that using mechanical force alone (e.g., grinding) would successfully planarize a surface; however, this would cause too much surface degradation. For more information about this process, see: http://maltiel-consulting.com/CMP-Chemical-mechanical_planarization_maltiel_semiconductor.pdf

For more information regarding interconnect fabrication, see: (a) http://web.stanford.edu/class/ee311/NOTES/Interconnect_Cu.pdf. (b) https://dokumente.unibw.de/pub/bscw.cgi/d9299614/04_Short-Channel%20MOSFET.pdf

This is typically performed through use of templates that are sacrificially removed following film deposition. For example, see: (a) Fuertes, M. C.; Soler-Illia, G. J. A. A. Chem. Mater. 2006, 18, 2109. (b) Xiao, L.; Zhang, H.; Scanlon, E.; Ramanathan, L. S.; Choe, E.-W.; Rogers, D.; Apple, T.; Benicewicz, B. C. Chem. Mater. 2005, 17, 5328. (c) Kanungo, M.; Deepa, P. N.; Collinson, M. M. Chem. Mater. 2004, 16, 5535. (d) Li, X. S.; Fryxell, G. E.; Birnbaum, J. C.; Wang, C. Langmuir 2004, 20, 9095.

For an animated website to illustrate the DC-diode and magnetron sputtering processes, see: http://www.ajaint.com/whatis.htm

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For a thorough description of kinetic and mass-transport mechanisms involved in CVD, as well as dependent variables, see: Pierson, H. O. Handbook of Chemical Vapor Deposition, 2nd ed., William Andrew: Norwich, NY, 1999.

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Zhang, W. J.; Bello, I.; Lifshitz, Y.; Chan, K. M.; Meng, X. M.; Wu, Y.; Chan, C. Y.; Lee, S. T. Adv. Mater. 2004, 16, 1405.

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Although commercial ALD systems are priced well over 0024;100,000 USD, effective laboratory-scale systems may be fabricated at much lower cost: Lubitz, M.; Medina, P. A.; Antic, A.; Rosin, J. T.; Fahlman, B. D. J. Chem. Ed. 2014, 91, 1022.

(a) Hansen, B. N.; Hybertson, B. M.; Barkley, R. M.; Sievers, R. E. Chem. Mater. 1992, 4, 749. (b) Lagalante, A. F.; Hansen, B. N.; Bruno, T. J.; Sievers, R. E. Inorg. Chem. 1995, 34, 5781. (c) Fernandes, N. E.; Fisher, S. M.; Poshusta, J. C.; Vlachos, D. G.; Tsapatsis, M.; Watkins, J. J. Chem. Mater. 2001, 13, 2023. (d) Cabanas, A.; Long, D. P.; Watkins, J. J. Chem. Mater. 2004, 16, 2028. (e) Blackburn, J. M.; Long, D. P.; Watkins, J. J. Chem. Mater. 2000, 12, 2625. (f) Blackburn, J. M.; Long, D. P.; Cabanas, A.; Watkins, J. J. Science 2001, 294, 141. (g) Cabanas, A.; Blackburn, J. M.; Watkins, J. J. Microelectron. Eng. 2002, 64, 53. (h) Ohde, H.; Kramer, S.; Moore, S.; Wai, C. M. Chem. Mater. 2004, 16, 4028.

For a thorough review of CVD/ALD precursors, see: Fahlman, B. D. Curr. Org. Chem. 2006, 10, 1021.

Gardiner, R. A.; Gordon, D. C.; Stauf, G. T.; Vaarstra, B. A.; Ostrander, R. L.; Rheingold, L. Chem. Mater. 1994, 6, 1967.

For an example of fluorine-free polyether ligands used to successfully prevent oligomerization of barium complexes (particularly problematic for heavy Group II complexes due to the large ionic radius of the metal), see: Studebaker, D. B.; Neumayer, D. A.; Hinds, B. J.; Stern, C. L.; Marks, T. J. Inorg. Chem. 2000, 39, 3148.

For example, see: Gillan, E. G.; Bott, S. G.; Barron, A. R. Chem. Mater. 1997, 9, 796.

Hansen, B. N.; Brooks, M. H.; Barkley, R. M.; Sievers, R. E. Chem. Mater. 1992, 4, 749.

(a) Banger, K. K.; Jin, M. H.-C.; Harris, J. D.; Fanwick, P. E.; Hepp, A. F. Inorg. Chem. 2003, 42, 7713. (b) Castro, S. L.; Bailey, S. G.; Raffaelle, R. P.; Banger, K. K.; Hepp, A. F. Chem. Mater. 2003, 15, 3142.

In order to reduce the adhesion between a polymeric mold and a silicon/quartz master, the master surface is typically modified with a fluorosilane (e.g., CF₃(CF₂)₆(CH₂)₂SiCl_3(g)). In addition, the final removal of the mold may also be carried out in the presence of a liquid with a low viscosity such as methanol (solvent-assisted micromolding (SAMIM)).

For a nice survey of the benefits for (nano)imprint lithography relative to photolithography, see: https://www.azonano.com/article.aspx?ArticleID=4323

A recent thorough review of nanofabrication using both hard and soft molds, as well as other forms of soft lithography, see: Gates, B. D.; Xu, Q.; Stewart, M.; Ryan, D.; Willson, C. G.; Whitesides, G. M. Chem. Rev. 2005, 105, 1171; for instance, CDs are made by imprinting patterns from Ni masters in polycarbonate (a) J. S. Winslow, IEEE Trans. Consumer Electron. 1976 (Nov.), 318); holograms are made by imprinting patterns from a fused quartz master in SURPHEX photopolymer (F. P. Shvartsman in Diffractive and Miniaturized Optics (Ed.: S.-H. Lee), SPIE Optical Engineering Press, Bellingham, WA, 1993, 165)

For example, see: Chou, S. Y.; Krauss, P. R.; Renstrom, P. J. Science 1996, 272, 85.

For example, see: Jackman, R. J.; Wilbur, J. L.; Whitesides, G. M. Science 1995, 269, 664.

(a) Im, J.; Kang, J.; Lee, M.; Kim, B.; Hong, S. J. Phys. Chem. B 2006, 110, 12839. (b) Cabrera, E. J.; Amade, R.; Jaller, L.; Pascual, E.; Bertran, E. J. Nanopart. Res. 2014, 16, 2172.

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Note: PDMS is known to swell in organic solvents and leaves a silicone residue behind during its release from the substrate; these limitations are overcome for PFPE molds; for example, see: (a) Lee, J. N.; Park, C.; Whitesides, G. M. Anal. Chem. 2003, 75, 6544. (b) Rolland, J. P.; Hagberg, E. C.; Denison, G. M.; Carter, K. R.; DeSimone, J. M. Angew. Chem., Int. Ed. 2004, 43, 5796. (c) Rolland, J. P.; Van Dam, R. M.; Schorzman, D. A.; Quake, S. R.; DeSimone, J. M. J. Am. Chem. Soc. 2004, 126, 2322.

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We will discuss the operating principle of atomic force microscopy (AFM) and other scanning force microscopies in more detail in Chap. 7. At this point, simply think of this technique as analogous to an antiquated record player, in which the needle gently touches the surface of the record to produce music. Similarly, the AFM tip either gently taps, or hovers immediately above, the surface of a planar substrate.

(a) Piner, R. D.; Zhu, J.; Xu, F.; Hong, S.; Mirkin, C. A. Science 1999, 283, 661. (b) Hong, S.; Zhu, J.; Mirkin, C. A. Science 1999, 286, 523. (c) Hong, S.; Mirkin, C. A. Science 2000, 288, 1808.

(a) Rozhok, S.; Piner, R.; Mirkin, C. A J. Phys. Chem. B 2002, 107, 751. (b) Hampton, J. R.; Dameron, A. A.; Weiss, P. S. J. Am. Chem. Soc. 2006, 128, 1648. (c) Liu, G.; Zhou, Y.; Banga, R. S.; Boya, R.; Brown, K. A.; Chipre, A. J.; Mirkin, C. A. Chem. Sci. 2013, 4, 2093. (d) Urtizberea, A.; Hirtz, M.; Fuchs, H. Nanofab. 2016, 2, 43.

For a nice summary of phosphor classes, see: (a) https://www.electrochem.org/dl/interface/wtr/wtr09/wtr09_p032-036.pdf. (b) Xie, R. J.; Hirosaki, N. Sci. Technol. Adv. Mater. 2007, 8, 588.

For a review of nitride- and oxynitride-based phosphors, see: Xie, R. J.; Hirosaki, N. Sci. Technol. Adv. Mater. 2007, 8, 588.

Bowers, M. J.; McBride, J. R.; Rosenthal, S. J. J. Am. Chem. Soc. 2005, 127, 15378.

The fabrication steps for polymer OLED displays include: (i) deposit and pattern the ITO anode, (ii) pattern the conducting and emissive polymer layers (via spin-coating, ink jet printing, screen printing, or web coating methods), (iii) pattern and vacuum deposit the cathode (Ba, Ca/Al, etc.). For small-molecule OLEDs, the multilayer structure is fabricated in vacuo, involving a variety of patterning steps via shadow masking, followed by thermal evaporation (PVD) of layers using appropriate source materials.

For a review of transparent conductive films (fabrication and applications), see: Gordon, R. G. MRS Bull. 2000, 8, 52.

For a review of the band structure of doped tin oxide, see: Batzill, M.; Diebold, U. Prog. Surf. Sci. 2005, 79, 47.

http://www.qcrsolutions.com/Site/OLED_and_PLED___QCR_Solutions_Corp.html

For a review of exciton formation and OLEDs, see: Yersin, H. Top. Curr. Chem. 2004, 241, 1.

Note: spin-orbit coupling refers to the interaction of the spin magnetic moment of an electron with the magnetic moment arising from the orbital motion of the electron.

For a nice summary of triplet emitters for OLED applications, see: Yersin, H.; Finkenzeller, W. J. in Highly Efficient OLEDs with Phosphorescent Materials, Yersin, H. ed., Wiley-VCH: Weinheim, 2008.

https://electronics.howstuffworks.com/oled3.htm

Vidor, F. F.; Meyers, T.; Hilleringmann, U. Electronics 2015, 4, 480.

For a historical review of TFT technology, see: http://www.electrochem.org/dl/interface/spr/spr13/spr13_p055_061.pdf

For more details regarding amorphous oxide semiconductors and thin-film transistor designs, see: (a) Fortunato, E.; Barquinha, P.; Martins, R. Adv. Mater. 2012, 24, 2945. (b) Park, J. S.; Maeng, W. J.; Kim, H. S.; Park, J. S. Thin Solid Films 2012, 520, 1679. (c) Lin, Y. H.; Faber, H.; Labram, J. G.; Stratakis, E.; Sygellou, L.; Kymakis, E.; Hastas, N. A.; Li, R.; Zhao, K.; Armassian, A.; Treat, N. D.; McLachlan, M.; Anthopoulos, T. D. Adv. Sci. 2015, 2, 1500058. (d) Kwon, J. Y.; Lee, D. J.; Kim, K. B. Electron. Mater. Lett. 2011, 7, 1. (e) Hosono, H.; Kim, J.; Toda, Y.; Kamiya, T.; Watanabe, S. Proc. Nat. Acad. Sci. 2016, 114, 233.

https://spectrum.ieee.org/semiconductors/materials/thin-fast-and-flexible-semiconductors

A nice brief overview of thermoelectricity may be found online: https://www.technologyreview.com/s/401415/thermoelectric-materials/

For details regarding all aspects of thermoelectric materials, refer to the March 31, 2006 issue of the MRS Bulletin, which is devoted entirely to this topic. More information is also found in: Uher, C. Materials Aspect of Thermoelectricity, CRC Press: New York, 2016 (ISBN: 9781498754903).

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Titel: Semiconductors
verfasst von: Bradley D. Fahlman
Verlag: Springer Netherlands
Buch: Materials Chemistry
Print ISBN: 978-94-024-1253-6

Electronic ISBN: 978-94-024-1255-0

Copyright-Jahr: 2018
DOI: https://doi.org/10.1007/978-94-024-1255-0_4

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