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Journal of Computational Electronics

Erschienen in:

13.02.2020

Two-dimensional modeling of the underlap graded-channel FinFET

verfasst von: Ankush Chattopadhyay, Atanu Kundu, Chandan K. Sarkar, Chayanika Bose

Erschienen in: Journal of Computational Electronics | Ausgabe 2/2020

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Abstract

The graded n-channel underlap fin-shaped field-effect transistor (FinFET) provides ample scope for future investigation. This device and the effects of the underlap, gate length, and doping concentration of the short channel are analyzed herein using two-dimensional (2-D) modeling. The proposed structure includes four regions, in each of which a potential function is developed by applying boundary conditions on Poisson’s equation. The parabolic potential profiles in the graded channel region and the underlap regions are found to depend on the bias at the gate/drain terminals, the doping profile, the channel length, and the underlap length, ensuring the reliability of the device for low-power circuit applications. The results of this analysis are validated against numerical solutions obtained using a 2-D device simulator, revealing an exact match.

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Titel: Two-dimensional modeling of the underlap graded-channel FinFET
verfasst von: Ankush Chattopadhyay
Atanu Kundu
Chandan K. Sarkar
Chayanika Bose
Publikationsdatum: 13.02.2020
Verlag: Springer US
Erschienen in: Journal of Computational Electronics / Ausgabe 2/2020
Print ISSN: 1569-8025
Elektronische ISSN: 1572-8137
DOI: https://doi.org/10.1007/s10825-020-01458-w

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