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Patent Issues of Fan-Out Wafer-Level Packaging Kapitel lesen Erstes Kapitel lesen

2018 | OriginalPaper | Buchkapitel

10. 3D Integration

verfasst von : John H. Lau

Erschienen in: Fan-Out Wafer-Level Packaging

Verlag: Springer Singapore

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Abstract

The Electronics Industry has been the largest industry since 1996 and may well reach 2 trillion dollars by the end of 2018. 3D IC packaging, 3D IC integration, and 3D Si integration will be discussed in this chapter.

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Vorheriges Kapitel Fan-Out Panel-Level Packaging (FOPLP)
Nächstes Kapitel 3D IC Heterogeneous Integration by FOWLP
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Metadaten
Titel
3D Integration
verfasst von
John H. Lau
Copyright-Jahr
2018
Verlag
Springer Singapore
Buch
Fan-Out Wafer-Level Packaging

Print ISBN: 978-981-10-8883-4

Electronic ISBN: 978-981-10-8884-1

Copyright-Jahr: 2018

DOI
https://doi.org/10.1007/978-981-10-8884-1_10

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