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Erschienen in: Journal of Electronic Testing 3/2020

06.06.2020

An Efficient VLSI Test Data Compression Scheme for Circular Scan Architecture Based on Modified Ant Colony Meta-heuristic

verfasst von: Sanjoy Mitra, Debaprasad Das

Erschienen in: Journal of Electronic Testing | Ausgabe 3/2020

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Abstract

A new test data compression scheme for circular scan architecture is proposed in this paper. A stochastic heuristic based bio-inspired optimization approach namely ant colony algorithm (ACO) is applied after modification and customization to improve compression efficiency. In circular scan architecture, test data compression is achieved by updating the conflicting bits between the most recently captured response and test vector to be applied next. The quantity of conflicting bits also manifests the Hamming distance between the most recently captured response and the next test vector. A significant reduction in test data volume and test application time is achieved by reducing Hamming distance. The problem is renovated as a traveling salesman problem (TSP). The test vectors are presumed as cities and Hamming distance between a pair of test vectors is treated as intercity distance and a modified ACO algorithm in combination with mutation operator is applied here to resolve this combinatorial optimization problem. The experimental results confirm the efficacy of this approach. An average improvement of 6.36% in compression ratio and 4.77% in test application time is achieved. The exhibited technique sustains an optimal level of performance without incurring any extra DFT (design for testability) cost.

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Metadaten
Titel
An Efficient VLSI Test Data Compression Scheme for Circular Scan Architecture Based on Modified Ant Colony Meta-heuristic
verfasst von
Sanjoy Mitra
Debaprasad Das
Publikationsdatum
06.06.2020
Verlag
Springer US
Erschienen in
Journal of Electronic Testing / Ausgabe 3/2020
Print ISSN: 0923-8174
Elektronische ISSN: 1573-0727
DOI
https://doi.org/10.1007/s10836-020-05880-7

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