FERMAT: FPGA energy reduction method by approximation theory

Today’s field programmable gate arrays (FPGAs) offer a significant computational power and are commonly used in modern commercial digital designs. However, they generally suffer from a large power consumption, which makes them unfit for battery-operated handheld devices. This paper addresses this problem by bringing the notion of approximate computing into the realm of reconfigurable devices such as LUT-based FPGAs. The proposed approximation is done by altering LUT contents in an exact design. The impact of this kind of approximation on output accuracy as well as design power consumption will be discussed. Once the theoretical foundation is established, we propose a method, called FERMAT (FPGA Energy Reduction Method by Approximation Theory), which takes an exact FPGA design and converts it into an approximated equivalent with a considerably reduced power consumption given a maximum error constraint. The effectiveness of FERMAT is shown by measuring the actual power consumption of an FPGA device performing an image processing application. Experimental results show about 8.5% power saving with an imperceptible loss in image quality.