Novel design of reversible priority encoder in quantum dot cellular automata based on Toffoli gate and Feynman gate

In accordance with Moore’s law, the size of complementary metal oxide semiconductor (CMOS)-based devices keep shrinking to augment the density on the chip. This scaling influences the execution of CMOS device due to several constraints like energy dissipation and synchronization of different components of the device. In non-reversible logic gates, power loss is the major concerned. Interest in reversible logic-based circuit design is increased as it offers reduced heat dissipation. Quantum dot cellular automata (QCA) is the possible implementation platform for reversible circuits. An encoder is an important component of memory, for address decoding and encoding. In this article, reversible logic-based architecture of 4 to 2 and 8 to 3 priority encoder is proposed and implemented on QCA platform. To design the encoder circuit, a new QCA layout of Feynman gate and Toffoli gate has been employed. The proposed layout of Feynman gate and Toffoli gate outshines the existing state-of-the-art designs. Quantum cost and circuit cost estimation of those encoder circuits are also performed. QCADesigner tool has been used to validate the performance of the proposed QCA reversible encoders.