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Erschienen in: Journal of Computational Electronics 3/2020

22.04.2020

A simulation study of the influence of a high-k insulator and source stack on the performance of a double-gate tunnel FET

verfasst von: Mohammad Karbalaei, Daryoosh Dideban, Hadi Heidari

Erschienen in: Journal of Computational Electronics | Ausgabe 3/2020

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Abstract

The influence of incorporating HfO2 as a dielectric at the drain side and a silicon stack at the source side on the electrical performance of a double-gate tunnel field-effect transistor (TFET) is investigated by comparing a conventional TFET structure with four other structures in which the gate dielectric material is either homogeneous or heterogeneous while the insulator on the drain side is either SiO2 or HfO2. Moreover, a structure with a silicon source stack is proposed and the figures of merit of the resulting device are compared with other counterparts. The results of the simulations reveal that the presence of an HfO2 insulator on the drain side reduces the ambipolar conduction while the heterogeneous gate dielectric enhances the drive current and transconductance. However, the use of HfO2 slightly deteriorates the source–gate and drain–gate capacitances in comparison with the conventional TFET. Furthermore, the incorporation of a silicon source stack along with a heterogeneous gate dielectric and HfO2 insulator on the drain side leads to a higher ION/IOFF ratio, lower subthreshold slope (S), and lower ambipolar conduction in the studied TFET with channel length of 50 nm.

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Metadaten
Titel
A simulation study of the influence of a high-k insulator and source stack on the performance of a double-gate tunnel FET
verfasst von
Mohammad Karbalaei
Daryoosh Dideban
Hadi Heidari
Publikationsdatum
22.04.2020
Verlag
Springer US
Erschienen in
Journal of Computational Electronics / Ausgabe 3/2020
Print ISSN: 1569-8025
Elektronische ISSN: 1572-8137
DOI
https://doi.org/10.1007/s10825-020-01497-3

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