Effects of interfacial layer on the electrical properties of n-ZnO/p-Si heterojunction diodes between 260 and 340 K

Electrical characteristics and transport properties of n-ZnO/p-Si heterojunction diodes were investigated by current–voltage (I–V) measurements between 260 and 340 K. The ZnO layer was deposited onto p-Si substrate via RF sputtering and the films were annealed at 673 K and 973 K, separately. X-ray diffraction analyses indicate that the both the films are highly oriented along (002) plane. Fourier-transform infrared spectroscopy measurements demonstrate that an interfacial layer (IL) is formed after 973 K annealing. The rectifying behavior of the diodes annealed at 673 K is better than the diodes annealed at 973 K due to the well interface and oxide quality. Saturation current (I_o), barrier height (ϕ_b) and ideality factor (n) markedly vary with ambient temperature. The I_o of the diodes annealed at 973 K is higher than the diodes annealed at 673 K which may be attributed to different activation energies of the defects. The ϕ_b values of the diodes annealed at 973 K significantly decrease, while the n values increase as compared to the diodes annealed at 673 K at the same ambient temperature. Forward bias I–V curves suggest that the current conduction can be approximated to space charge limited current transport between 340 and 300 K, while defect assisted tunneling becomes more dominant to carrier conduction between 300 K and 260 K for the diodes annealed at 673 K. On the other hand, the tunneling transport dominates the current conduction of the diodes annealed at 973 K at all ambient temperatures. The obtained results have depicted that presence of the parasitic IL significantly degrades the electrical performance of diodes.