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Microsystem Technologies
Erschienen in: Microsystem Technologies 10/2020

07.12.2017 | Technical Paper

Impact of sidewall spacer on n-InGaAs devices and hybrid InGaAs/Si CMOS amplifiers in deca-nanometer regime

verfasst von: Suchismita Tewari, Suchismita De, Abhijit Biswas, Abhijit Mallik

Erschienen in: Microsystem Technologies | Ausgabe 10/2020

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Abstract

In this paper, we report, for the first time, the influence of the sidewall spacers (SWS) on the analog performance of InGaAs nMOSFETs at channel lengths of 32 and 22 nm. The study is further extended to the circuit level in which the impact of spacer layer on hybrid CMOSFETs comprising InGaAs nMOSFETs and Si pMOSFETs is thoroughly investigated in analog domain. Using extensive numerical analysis we study the impact of SWS layers on various device parameters e.g., transconductance (gm), transconductance efficiency (gm/ID), output conductance (gd) and intrinsic gain (gm/gd) related to analog applications. Then, the hybrid CMOS current source load amplifier is studied in terms of voltage gain, total capacitance (CTotal) and gain bandwidth product (GBW). The simulation scheme is validated with reported experimental data in the literature. Our findings reveal that all the parameters at the device level, except gd exhibit improved performance for higher value of spacer k. On the contrary, gd decreases with reduced k-value and becomes weakly sensitive to the variation in spacer length (Lsp), for the InGaAs nMOS device having channel lengths (Lg) of 22 and 32 nm. At the circuit level, for the hybrid CMOS amplifier, we found that the dc-gain and CTotal exhibit larger value for higher value of Lsp, while GBW shows higher value for reduced Lsp. Our investigation suggests that improved analog performance of InGaAs nMOSFETs with suitable SWS engineering may be achieved at more advanced technology nodes.
Vorheriger Artikel Impact of aspect ratio of nanoscale hybrid p-Ge/n-Si complementary FinFETs on the logic performance
Nächster Artikel Free and forced vibration analysis of viscoelastic damped FG-CNT reinforced micro composite beams

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Metadaten
Titel
Impact of sidewall spacer on n-InGaAs devices and hybrid InGaAs/Si CMOS amplifiers in deca-nanometer regime
verfasst von
Suchismita Tewari
Suchismita De
Abhijit Biswas
Abhijit Mallik
Publikationsdatum
07.12.2017
Verlag
Springer Berlin Heidelberg
Erschienen in
Microsystem Technologies / Ausgabe 10/2020
Print ISSN: 0946-7076
Elektronische ISSN: 1432-1858
DOI
https://doi.org/10.1007/s00542-017-3658-4

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