Variation resilient low-power memristor-based synchronous flip-flops: design and analysis

Flip-flops are the basic digital components for all types of complex digital electronics systems and sequential logic circuits. In this paper, new nonvolatile, low power, robust, compact and fully integrable SR and D flip-flops using a mathematical model of the memristor and CMOS are proposed. The memristor model captures all the well-established features of the memristor devices. A thorough investigation of the electrical response of memristor has been done and based on that the most suitable mechanisms for read and write operations have been recommended and their advantages are also listed. To propose a low power and reliable flip-flop, the nonvolatile nature of memristor is utilized. The tradeoffs between the design parameters such as read and write access times, energy dissipation and robustness have been analyzed. CMOS based transmission gates have been used to provide access for the inputs to the internal memristors of the architecture during write operations. The simulation is performed utilizing a 45-nm CMOS model.