Materials for Advanced Packaging

Frontmatter

Chapter 1. 3D Integration Technologies – An Overview

Abstract

The next generation of integrated micro-system technologies can only keep up with increased functionality and performance demands by using the 3rd dimension. The primary drivers for 3D integration are miniaturization, integration of different technologies in a small form-factor, and performance. 3D integration technologies can be grouped into 3 main categories, namely 3D On-chip integration, 3D IC-stacking, and 3D-packaging. This chapter provides a detailed review of each of these categories.

Rajen Chanchani

Chapter 2. Advanced Bonding/Joining Techniques

Abstract

In this chapter, three advanced bonding/joining techniques, adhesive bonding, direct bonding, and lead-free soldering, are presented. For each technique, we first review the bonding principles and applications in electronic industries, followed by novel bonding materials and processes.

For adhesive bonding, four popular adhesives, epoxy resins, silicon resins, polymides, and acrylics, are reviewed. Two new adhesives, liquid crystal polymer (LCP) and SU8, are covered too. LCP has the properties of both polymers and liquid crystals. It, thus, can be bonded to silicon, metal, and glass, and used as flexible circuit board. SU 8, an epoxy-based negative type photoresist, has been applied to zero-level-packaging technology for low-cost wafer-level MEMS packaging.

For direct bonding, three popular methods, anodic bonding, diffusion bonding, and surface-activated bonding, are discussed. Anodic bonding process has extensive applications in silicon-glass bonding and glass-glass bonding. Diffusion bonding process forms chemical bonds by inter-diffusion of two different atoms over the bond line. Surface-activated bonding is valuable in bonding objects with large difference in coefficients of thermal expansion because of low process temperature, usually room temperature. A novel Ag-to-Cu direct bonding technique at bonding temperature of 250°C is reported.

In lead-free soldering, fundamental soldering principle is presented. To eliminate the use of fluxes, oxidation-free fluxless soldering technology has been developed. It has been applied to developing numerous soldering processes based on systems such as Sn-Au, Sn-Cu, Sn-Ag, In-Au, In-Cu, and In-Ag. Two fluxless processes are reported. One is bonding between Si/Cr/Au/Sn/Ag and Si/Cr/Au. The other is between Si/Cr/Au/Ag and Cu/Ag/In/Ag. In either process, high bonding quality is achieved without using any flux. Fluxless process has also been demonstrated in flip-chip configuration using Sn-rich solder joints.

Chin C. Lee, Pin J. Wang, Jong S. Kim

Chapter 3. Advanced Chip-to-Substrate Connections

Abstract

Transistor scaling, shrinking the critical dimensions of the transistor, has led to continuous improvements in system performance and cost. Higher density of the transistors and larger chip size has also led to new challenges for chip-to-substrate connections. The pace of change in packaging and chip-to-substrate connections has accelerated because off-chip issues are increasingly a limiting factor in product cost and performance. Chip-to-substrate connections are challenged on many fronts, including number of signal input-output (I/O) connections, I/O that operate at high-speed, power & ground I/O, and low cost.

This chapter examines various techniques and structures that have been designed to address these challenges. The mechanical compliance and electrical performance modeling of the interconnect structures is important in determining the geometry, materials, and processing necessary for an application. Various approaches have been taken to satisfy both the mechanical and electrical needs for these I/O connections. Mechanically compliant structures based on traditional solder bonded connections can drastically improve thermo-mechanical reliability but may compromise electrical performance. Additional structures improve upon the compliance of the solder ball by capping a pillar structure with solder, but still require the reliable protection of underfill. More high performance and long term improvements to satisfy both mechanical and electrical needs such as interconnects composed entirely of copper are also discussed. Finally, the future needs projected by the ITRS for ultra-high off-chip frequency and thermal management are addressed with respect to chip-to-substrate interconnects.

Paul A. Kohl, Tyler Osborn, Ate He

Chapter 4. Advanced Wire Bonding Technology: Materials, Methods, and Testing

Abstract

Wirebonding is the most dominant form of first-level chip or integration circuit interconnect method used throughout the world-wide electronics industry today. Many trillion of wirebonds are made annually using automated machines. Wirebonding is reliable, flexible, and low cost when compared to other forms of first-level microelectronic interconnection. Failures are typically at the single digit parts per million level or below. As the number of interconnections on the integrated circuit grows with increased functionality, the bonding pads are becoming much smaller and closer together. Similarly rigid inorganic substrates and package structures have given way to their more flexible organic counterparts. Everywhere in the microelectronic industry new applications, materials, and structures are appearing and challenging the performance and, hence, the dominance of wirebonding.

This chapter focuses on the basic wirebonding methods, the materials, and the testing techniques required to produce high quality wirebonds. It addresses the organic substrate problem, stacked chip bonding, and interconnection over extreme temperature ranges. Reliability of the wirebonded interconnect is explored along with testing and control methods designed to improve bond quality. High frequency bonding and the bonding to soft substrates are given special attention. Wire properties are considered along with the changing bond shapes and sizes as the number of chip’s inputs and outputs increase. Methods for chip bumping using a wirebonding machine are also presented.

Harry K. Charles

Chapter 5. Lead-Free Soldering

Abstract

Due to the global trend of green manufacturing, lead-free becomes the main stream soldering choice of electronic industry. SnAgCu alloys are the prevailing choices, with SnCu(+Y), SnAg(+Y), and BiSn(+Y) families also being adopted, where Y represents minor additive elements. The soldering processing window is narrower than that of Sn63, mainly due to the elevated melting temperature of SnAgCu solder and the limited high temperature tolerance of components and board. The high surface tension of Sn aggravates the difficulty in wetting, while the high reactivity of Sn puts more constraint in contact time allowed between molten solder and base metal or solder container. The creep rate of SnAgCu is slower at low stress, but faster at high stress than Sn63. This results in a longer temperature cycling life at low joint strain applications, but a shorter cycling life at high joint strain applications. Higher Cu content stabilizes IMC structure at interface between SnAgCu solder and NiAu. The high rigidity of SnAgCu solders enhances the fragility of joints, although significant improvement has been accomplished via low Ag or high Cu content or doping approaches.

Ning Cheng Lee

Chapter 6. Thin Die Production

Abstract

Thin silicon die production is becoming a challenge for all spheres of semiconductor industry. The diversity of requirements and constraints for various applications leads to a lot of different solutions for making thin dies. This chapter describes recent developments on silicon wafer thinning and singulation. Various technologies for material removal and the associated damage caused by the material removal are reviewed in details. Different surface treatment approaches and their effect on improving mechanical property of thinned silicon are also discussed in this chapter.

Werner Kroeninger

Chapter 7. Advanced Substrates: A Materials and Processing Perspective

Abstract

This chapter reviews materials and processing for fabricating organic substrates including laminate substrates for plastic BGA (PBGA), build-up substrates for flip chip BGA (FCBGA), tape substrate for tape BGA (TBGA), coreless substrate, and some specialty substrates such as substrates for RF modules, high performance substrates with low dielectric constant, and substrate with embedded components (active dies or passives). Future trend of organic substrate development is also covered in this chapter.

Bernd Appelt

Chapter 8. Advanced Print Circuit Board Materials

Abstract

Printed Circuit Board (PCB) materials refer to a set of dielectric and conductive materials used to form circuit board interconnects. The PCB industry offers a wide array of material options to meet different performance and cost requirements. Copper is the primary conductive material used in PCBs due to its cost and electrical conductivity as well as its stability and ease of processing. The most common and widely recognized class of PCB dielectric materials is FR-4 which describes a group of woven glass reinforced tetra-functional epoxy materials. The continued use and longevity of copper and FR-4 materials is due to a combination of their availability, low cost, processability, and adequate electrical, mechanical and thermal properties.

Advanced PCB materials refer to non-FR-4 dielectrics, enhanced or modified FR-4 dielectric materials as well as advanced copper foils. All advanced PCB materials offer some unique set of electrical, mechanical, thermal, or chemical properties that have been optimized for a particular application, design challenge, or manufacturing issue. As a result of the unique challenges and cost sensitivity of different markets, the number of advanced materials that have been made available has increased significantly in recent years.

The past decade has seen many new materials introduced to the market that are variations on previous materials. These new materials are tailored by adding or changing one or more components to optimize the material properties for a specific application or market. Examples include utilizing epoxy blends or adding fillers to increase a materials’ glass transition temperature, change its dielectric constant or using a different glass formulation for the reinforcement fabric to reduce the materials’ dissipation factor. Other examples include changing a material processing steps such as removing the twist in glass yarns to create reinforced materials that have less spatial variation to improve laser ablation processibility and spatial electrical variation.

Gary Brist, Gary Long

Chapter 9. Flip-Chip Underfill: Materials, Process and Reliability

Abstract

In order to enhance the reliability of a flip-chip on organic board package, underfill is usually used to redistribute the thermo-mechanical stress created by the Coefficient of Thermal Expansion (CTE) mismatch between the silicon chip and organic substrate. However, the conventional underfill relies on the capillary flow of the underfill material and has many disadvantages. In order to overcome these disadvantages, many variations have been invented to improve the flip-chip underfill process. This paper reviews the recent advances in the material design, process development, and reliability issues of flip-chip underfill, especially in no-flow underfill, molded underfill, and wafer-level underfill. The relationship between the materials, process and reliability in these packages is discussed.

Zhuqing Zhang, C. P. Wong

Chapter 10. Development Trend of Epoxy Molding Compound for Encapsulating Semiconductor Chips

Abstract

Epoxy molding compounds (EMCs) have been used extensively as an encapsulation and protection material for semiconductor packages and must meet ever-evolving packaging requirements including moisture sensitivity level (MSL), moldability, and environmental and other reliability 1000 requirements. This chapter provides an overview of most recent development on various aspects of EMCs including advanced material development, molding process, and approaches to improve moldability, moisturized reflow resistance, warpage control of molded area array packages, and stress management for molding die with low-k interlayer dielectrics (ILD).

Shinji Komori, Yushi Sakamoto

Chapter 11. Electrically Conductive Adhesives (ECAs)

Abstract

Recently, significant advances have been made to improve electrically conductive adhesive (ECA) technology. Recent material development of various anisotropic conductive adhesives/films (ACAs/ACFs) and their applications are reviewed first and then recent research achievements in material development and in both electrical and mechanical aspects of isotropic conductive adhesives (ICAs) including electrical conductivity improvement, contact resistance mechanism elucidation and approaches to stabilize the contact resistance, and mechanical impact performance enhancement are reviewed in details.

Daoqiang Daniel Lu, C.P. Wong

Chapter 12. Die Attach Adhesives and Films

Abstract

This chapter outlines the strong correlation between developments in electronic packaging technologies and required properties of die attach materials. An overview of die attach materials is summarized with the trends in the market. Die attach paste, adhesive tape for a lead on chip (LOC), die attach film, and the prospects of advanced die attach film are described in each section. The technical requirements of the die attach materials, which include high purity, fast curing, low stress and high package crack resistance are discussed.

Die attach films have become the main stream of die attach materials owing to their excellent properties and reliability. The future of advanced die attach films is explained with the introduction of adhesive film with dicing / die attach dual functionality.

The effects of adhesive properties such as peel strength and water absorption to improve package crack resistance are reported in detail. The development of die attach films with excellent reliability for advanced packages such as BGA/CSP is also reviewed.

Shinji Takeda, Takashi Masuko

Chapter 13. Thermal Interface Materials

Abstract

Increasing electronic device performance has historically been accompanied by increasing power and increasing on-chip power density both of which present a cooling challenge. Thermal Interface Material (TIM) plays a key role in reducing the package thermal resistance and the thermal resistance between the electronic device and the external cooling components. This chapter reviews the progress made in the TIM development in the past five years. Rheology based modeling and design is discussed for the widely used polymeric TIMs. The recently emerging technology of nanoparticles and nanotubes is also discussed for TIM applications. This chapter also includes TIM testing methodology and concludes with suggestion for the future TIM development directions.

Ravi Prasher, Chia-Pin Chiu

Chapter 14. Embedded Passives

Abstract

Driven by ever growing demands of miniaturization, increased functionality, high performance, and low cost for microelectronic products and packaging, new and unique solutions in IC and system integration, such as system-on-chip (SOC), system-in-package (SiP), system-on-package (SOP), have been hot topics recently. Despite the high level of integration, the number of discrete passive components (resistors, capacitors, or inductors) remains very high. In a typical microelectronic product, about 80% of the electronic components are passive components, which are unable to add gain or perform switching functions in circuit performance, but these surface-mounted discrete components occupy over 40% of the printed circuit/wiring board (PCB/PWB) surface area and account for up to 30 percent of solder joints and up to 90 percent of the component placements required in the manufacturing process. Embedded passives, an alternative to discrete passives, can address these issues associated with discrete counterparts, including substrate board space, cost, handling, assembly time, and yield [1, 2]. Figure 14.1 schematically shows an example of realization of embedded passive technology by integrating resistor and capacitor films into the laminate substrates.

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By removing these discrete passive components from the substrate surface and embedding them into the inner layers of substrate board, embedded passives can provide many advantages such as reduction in size and weight, increased reliability, improved performance and reduced cost, which have driven a significant amount of effort during the past decade for this technology. This chapter provides a review on most recent development in embedded inductors, capacitors, and resistors.

Dok Won Lee, Liangliang Li, Shan X. Wang, Jiongxin Lu, C. P. Wong, Swapan K. Bhattacharya, John Papapolymerou

Chapter 15. Nanomaterials and Nanopackaging

Abstract

This chapter provides a brief overview on nanomaterials and nanopackaging, and then a review on recent advances on nanoparticles and their applications, lead-free nanosolder, carbon nanotubes (CNT) and their applications for interconnect, thermal management, and integration into microsystems. Also, operation principle, fabrication techniques, and packaging of piezoelectric nanogenerators based on vertically aligned Zinc oxide (ZnO) nanowires (NWs) are reviewed in great details and possible solutions for improving the nanogenerator’s performance by improving the packaging technique are discussed.

X.D. Wang, Z.L. Wang, H.J. Jiang, L. Zhu, C.P. Wong, J.E. Morris

Chapter 16. Wafer Level Chip Scale Packaging

Abstract

Wafer Level Packaging (WLP) based on redistribution is the key technology which is evolving to System in Package (SiP) and Heterogeneous Integration (HI) by 3-D packaging using Through Silicon Vias (TSV). Materials and process technologies are key for a reliable WLP. It is not only the choice for the right polymer or metal but the interfaces could be even more critical like under bump metallurgy or the adhesion of polymers. This chapter focuses on the materials and processes for WLP which are the basic for all new 3-D integration technologies.

Michael Töpper

Chapter 17. Microelectromechanical Systems and Packaging

Abstract

Microelectromechanical systems (MEMS) technology enables us to create different sensing and actuating devices integrated with microelectronic, optoelectronic, radio frequency (RF), thermal, and mechanical devices for advanced microsystems. In all these systems that demand low cost and small size, MEMS packaging is usually a major consideration. The relationship between MEMS and packaging, however, is not limited to packaging of MEMS devices. MEMS devices can in fact be used to enhance packaging technologies for microelectronic, optoelectronic and RF systems. In addition, packaging technologies can be applied to fabricate MEMS devices. Therefore, packaging and MEMS technologies are essential to integrate sensors and actuators with other components on a single system platform. MEMS reliability as showstopper can be removed, and there is a great opportunity to apply MEMS and packaging technologies to develop fully integrated micro/nanosystems in the future.

Y. C. Lee

Chapter 18. LED and Optical Device Packaging and Materials

Abstract

As for integrated circuit (IC) device packaging, the packaging materials are critical to the LED packaging because the device packaging and assembly yield, and the device reliability and lifetime are determined by the quality of packaging and assembly materials as well as their processing. This presents serious challenges to the development of LED packaging materials, which is exactly the objective of this chapter to review those challenges and to point out the direction of further development.

It is proper to point out here that although this chapter will focus on the packaging materials for LEDs, the information provided by this chapter is equally applicable to the packaging of other optical devices including laser diodes, optical sensors, fiber optic devices, optical detectors, optical couplers, etc.

The first section will review materials challenges and some solutions for the packaging of high power LEDs, followed by functions of packaging and materials for advanced optoelectronic device packaging/manufacturing. The advanced encapsulation, lens, chip bonding and PCB materials for high power LED packaging will be presented in these sections. As a conclusion, we will point out the directions of materials for advanced high-power LED and optoelectronic device packaging as well as the requirements and approaches to determine LED performance and reliability.

Yuan-Chang Lin, Yan Zhou, Nguyen T. Tran, Frank G. Shi

Chapter 19. Digital Health and Bio-Medical Packaging

Abstract

This chapter reviews the healthcare trends and implications, as well as electronic packaging applications in implantable devices, pacing leads, bio-medical sensors, and point-of-care sensors. Each presents unique opportunities and challenges for electronic packaging and materials.

Lei Mercado, James K. Carney, Michael J. Ebert, Scott A. Hareland, Rashid Bashir

Backmatter