Field-Coupled Nanocomputing

Quantum-dot cellular automata (QCA) is a paradigm for connecting nanoscale bistable devices to accomplish general-purpose computation. The idea has its origins in the technology of quantum dots, Coulomb blockade, and Landauer’s observations on digital devices and energy dissipation. We examine the early development of this paradigm and its various implementations.

We describe the background and evolution of our work on magnetic implementations of Quantum-Dot Cellular Automata (QCA), first called Magnetic QCA (MQCA), and now known as Nanomagnet Logic (NML).

We review our recent efforts in building atom-scale quantum-dot cellular automata circuits on a silicon surface. Our building block consists of silicon dangling bond on a H-Si(001) surface, which has been shown to act as a quantum dot. First the fabrication, experimental imaging, and charging character of the dangling bond are discussed. We then show how precise assemblies of such dots can be created to form artificial molecules. Such complex structures can be used as systems with custom optical properties, circuit elements for quantum-dot cellular automata, and quantum computing. Considerations on macro-to-atom connections are discussed.

A signal distribution network (SDN) for Quantum-dot Cellular Automata (QDCA) devices is described. This network allows the distribution of a set of inputs to an arbitrary number of outputs in any desired order, overcoming the challenges associated with wire crossings that have faced QDCA systems in the past. The proposed signal distribution network requires only four distinct clock signals, regardless of the number of inputs or outputs, and those clock signals each repeat a very simple pattern. This network is highly scalable, completing the distribution of N inputs to an arbitrary number of distributed signals in 4N – 2 clock cycles. The operation of this device is demonstrated by applying it to a two-input/one-output XOR gate and a three-input/two-output full adder. A modified SDN customized for use with sequential devices is also shown.

Among Field-Coupled technologies, NanoMagnet Logic (NML) is one of the most promising. Low dynamic power consumption, total absence of static power, remarkable heat and radiations resistance, in association with the possibility of combining memory and logic in the same device, make this technology the ideal candidate for low power, portable applications. However, the necessity of using an external magnetic field to locally control the circuit represents, currently, the weakest point of this technology. The high power losses in the clock generation system adopted up to now wipes out the most important advantages of this technology.

In this chapter we discuss a clock system based on a piezoelectric actuator that allows electrical control of NanoMagnet Logic circuits. The low power consumption coupled with the fact that electric fields are easier to generate at the nanoscale level makes this clock system a strong candidate as the final and effective clocking mechanism for this technology. Another remarkable advantage of the proposed solution resides in its compatibility with currently available technology.

Quantum-dot Cellular Automata (QCA) based on majority logic is a promising technology for implementation of future integrated circuits. However, the current majority logic synthesis approaches based on three-feasible networks often lead to inefficient QCA circuit implementations. In this work, four-feasible networks are used as the starting point; therefore each node in the network can accommodate one extra variable. Using the Nauty algorithm, 222 standard functions along with their majority gate mapping are identified for Boolean logic functions with up to four-variables. In addition, all redundancies in the synthesized results are eliminated to reduce the size of the QCA circuit implementations. The proposed method leads to an average reduction of 7.94 % in terms of levels of logic and 8.13 % in terms of gates for the 24 Microelectronics Center of North Carolina (MCNC) benchmarks as compared to other methods.

Reversible computing is based on logic circuits that can generate unique output vector from each input vector, and vice versa, that is, there is a one-to-one mapping between the input and the output vectors. Reversible computing is the only solution for non-dissipative ultra low power green computing. Conservative reversible circuits are a specific type of reversible circuits, in which there would be an equal number of 1s in the outputs as there would be on the inputs, in addition to one-to-one mapping. This work illustrates the application of reversible logic towards testing of faults in traditional and reversible field coupled nanocircuits (Portions of this chapter are based on [2]. The enhancement is comprehensive treatment of: basics of reversible computing, motivation for reversible computing, background on conservative logic, basics of QCA computing, such as QCA logic devices and QCA clocking, related work etc. Several new reversible testable designs are introduced such as design of testable reversible T latch, design of testable asynchronous set/reset D latch and master-slave D flip-flop, design of testable reversible complex sequential circuits. QCA layouts of conservative logic gates are introduced with internal design details of QCA logic devices. Complete fault patterns information and analysis are provided for conservative logic gates. The synthesis of non-reversible testable design based on MX-cqca gate is extended to MX-cqca based implementation of standard functions. The significance of this work and broader prospective for future directions is also presented.). We propose the design of two vectors testable sequential circuits based on conservative logic gates. The proposed sequential circuits based on conservative logic gates outperform the sequential circuits implemented in classical gates in terms of testability. Any sequential circuit based on conservative logic gates can be tested for classical unidirectional stuck-at faults using only two test vectors. The two test vectors are all 1s, and all 0s. The designs of two vector testable latches, master-slave flip-flops, double edge triggered flip-flops, asynchronous set/reset D latch and D flip-flop are presented. The importance of the proposed work lies in the fact that it provides the design of reversible sequential circuits completely testable for any stuck-at fault by only two test vectors, thereby eliminating the need for any type of scan-path access to internal memory cells. The reversible designs of the double edge triggered flip-flop, ring counter and Johnson Counter are proposed for the first time in literature. We are showing the application of the proposed approach towards 100 % fault coverage for single missing/additional cell defect in the QCA layout of the Fredkin gate. We are also presenting a new conservative logic gate called Multiplexer Conservative QCA gate (MX-cqca) that is not reversible in nature but has similar properties as the Fredkin gate of working as 2:1 multiplexer. The proposed MX-cqca gate surpasses the Fredkin gate in terms of complexity (the number of majority voter), speed and area.

This work describes an integration of logic within the Spin Transfer Torque Magnetoresistive RAM (STT-MRAM) framework. For memory, a minimum separation between the cells is required to ensure bit-to-bit independency. For logic that relies on magnetostatic coupling, a maximum separation is allowed between magnetic cells for effective computation. Integration of the two functionalities therefore requires meeting the orthogonal spatial needs of separation. In this work the technological challenges of this integration are first described followed by the specifications of the new STT-MRAM based logic-in-memory architecture. How a spin transfer torque based control, also called clock, can tune the architecture between logic and memory modes is next described. A reference free variability tolerant differential read scheme leveraging the integration is presented. This logic-in-memory framework is also an integration between magnetic and CMOS planes. Finally, a logic partitioning between the two planes is described that can significantly improve the performance metrics.

Quantum-dot cellular automata (QCA) technology has advantages of fast computation performance, high density and low power consumption. Thus, it is believed that QCA is attractive for designing future digital systems. Side channel attacks including power analysis attacks have become a significant threat to the security of cryptographic circuits using CMOS technology. A power analysis attack can reveal the secret key of a cryptographic cipher by measuring the power consumption of the cipher’s hardware platform while it is encrypting or decrypting data. As the power consumption of QCA circuits is extremely low when compared to their CMOS counterparts, it may be possible to build cryptographic circuits that are immune to power analysis attacks by using QCA technology. Therefore, in this chapter an investigation into both the best and worst case scenarios for attackers is carried out to ascertain if QCA circuits have such an advantage. A more efficient QCA design of a sub-module of the Serpent cipher is proposed and compared to a previous design. By using an upper bound power model, the first power analysis attack of a QCA cryptographic circuit (Serpent sub-module) is presented. The results show that in the best case scenario for attackers, QCA cryptographic circuits would be vulnerable to power analysis attack. However, the security of practical QCA circuits can be greatly improved by applying a smoother clock. Moreover, in the worst case scenario, reversible QCA circuits with Bennett clocking could be used as a natural countermeasure to power analysis attack. Therefore, it is believed that QCA could be a niche technology in the future for the implementation of security architectures resistant to power analysis attack.

In recent years Field-Coupled devices, like Quantum dot Cellular Automata, are gaining an ever increasing attention from the scientific community. The computational paradigm beyond this device topology is based on the interaction among neighbor cells to propagate information through circuits. Among the various implementations of this theoretical principle, NanoMagnet Logic (NML) is one of the most studied. The reason lies to some interesting features, like the possibility to combine memory and logic in the same device and the possible low power consumption. Since the working principle of Field-Coupled devices is completely different from CMOS technology, it is important to understand all the implications that this new computational paradigm has on complex circuit architectures.

In this chapter we deeply analyze the major issues encountered in the design of complex circuits using Field-Coupled devices. Problems are analyzed and techniques to solve them and to improve performance are presented. Finally, a realistic analysis of the applications best suited for this technology is presented. While the analysis is performed using NanoMagnet Logic as target, the results can be applied to all Field-Coupled devices. This chapter therefore supplies researchers and designers with the essential guidelines necessary to design complex circuits using NanoMagnet Logic and, more in general, Field-Coupled devices.

In the past several years, incredible advances in the availability of nano fabrication processes have been witnessed, and have demonstrated molecular-scale production beyond the usable limit for CMOS process technology. This has led to the research and early development of a wide-range of novel computing paradigms at the nanoscale; amongst them, quantum dot cellular automata (QCA). QCA is a nanoelectronic computing paradigm in which an array of cells, each electrostatically interacting with its neighbors, is employed in a locally interconnected manner to implement general purpose digital circuits. Several proof-of-concept QCA devices have been fabricated using silicon-on-insulator (SOI), metallic island devices operating in the Coulomb blockade regime, and nano-magnetics. In recent years, research into implementing these devices using single molecules has also begun to generate significant interest, and most recently, it was demonstrated that silicon atom dangling bonds (DBs), on an otherwise hydrogen terminated silicon crystal surface, can serve as quantum dots.

Among the emerging technologies Field-Coupled devices like Quantum dot Cellular Automata are one of the most interesting. Of all the practical implementations of this principle NanoMagnet Logic shows many important features, such like a very low power consumption and the feasibility with up-to-date technology. However its working principle, based on the interaction among neighbor cells, is quite different from CMOS circuits. Dedicated design and simulation tools for this technology are necessary to further study this technology, but at the moment there are no such tools available in the scientific scenario.

In this chapter we present ToPoliNano, a software developed as a design and simulation tool for NanoMagnet Logic, that can be easily adapted to many other emerging technologies, particularly to any kind of Field-Coupled devices. ToPoliNano allows to design circuits following a top-down approach similar to the ones used in CMOS and to simulate them using a switch model specifically targeted for high complexity circuits. This tool greatly enhances the ability to analyze and optimize the design of Field-Coupled circuits.

Molecular QCA are considered among the most promising beyond CMOS devices. Frequency as well as self-assembly characteristics are the features that make them most attractive. Several challenges restrain them for being exploited from a practical point of view in the near future, not only for the difficulties at the technological level, but for the inappropriateness of the tools used when studying and predicting their behavior.

In this chapter we describe our methodology to simulate and model sequences of bisferrocene molecules aimed at understanding the behavior of a realistic MQCA wire. The simulations consider as variables distances between successive molecules, as well as different electric field applied (in terms of input and of clock). The method can be used to simulate and model also other more complex structures, and perspectives are given on the exploitation of the achieved results.

Emerging devices promise energy-efficient computing on a massively parallel scale, but due to the extremely high integration density the previously insignificant dissipation due to information erasure (destruction) becomes a prominent circuit design factor. The amount of heat generated by erasure depends on the degree of logical reversibility of the circuits and successful adiabatic charging. In this paper, we design an adiabatic arithmetic-logic unit to prototype the locally-connected Bennett-clocked circuit design approach. The results indicate one or two orders-of-magnitude energy savings in this physical circuit implementations vs. standard static CMOS. Previous work on computer arithmetic suggests that common hardware implementations erase much more information than would be required by a theoretical minimal mapping of the addition operation. A Bennett-clocked approach can reach the theoretical minimum number of bit erasures in the binary addition, though simulations show that a transistor technology has energy loss due to parasitic components that can exceed the information loss heat. In this paper, we describe the relationship between adiabatic and logically reversible circuits, and predict the potential of the arithmetic implementations based on quantum-dot cellular automata, which enable the full benefits of reversible, locally connected circuits to be realized.

A modular approach for determination of lower bounds on heat dissipation in clocked quantum-cellular automata (QCA) circuits is proposed, and its application is illustrated. This approach, which is based on a methodology developed previously for determining dissipation bounds in nanocomputing technologies, simplifies analysis of clocked QCA circuits that are designed according to specified design rules. Fundamental lower bounds on the dissipative costs of irreversible information loss for a (generally large and complex) QCA circuit are obtained in the modular approach by (i) decomposing the circuit into smaller zones, (ii) obtaining dissipation bounds for the individual circuit zones, and (iii) combining results from the individual-zone analyses into a single bound for the full circuit. The decomposition strategy is specifically designed to enable this analytical simplification while ensuring that the consequences of intercellular interactions across zone boundaries - interactions that determine the reversibility of local information loss in individual zone - are fully preserved and properly captured in the modular analysis. Application of this approach to dissipation analysis of a QCA half adder is illustrated, and prospects of using the modular approach for automation of QCA dissipation analyses is briefly discussed.

The FCN’13 Workshop, held at the University of South Florida in February 2013, concluded with a panel discussion on opportunities and critical challenges facing research in field-coupled nanocomputing. The panelists were Craig Lent (Notre Dame), Wolfgang Porod (Notre Dame), and Robert Wolkow (Alberta). Questions were posed to the panel and to all workshop participants by moderator Neal Anderson (UMass Amherst), and by the panelists and participants themselves. What follows is an edited transcript of that discussion. All participants in this discussion had the opportunity to review the edited transcript and offer corrections and clarifications. Editor’s notations are enclosed in square brackets.