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Journal of Electronic Testing

Ausgabe 2/2001

Inhalt (13 Artikel)

Editorial Introduction

Editorial

Vishwani D. Agrawal

Editorial Introduction

Guest Editorial

Marcelo Lubaszewski, Victor Champac

Detectability Conditions of Full Opens in the Interconnections

Antonio Zenteno, Victor H. Champac, Joan Figueras

An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths

Nektarios Kranitis, Antonis Paschalis, Dimitris Gizopoulos, Mihalis Psarakis, Yervant Zorian

Cost/Quality Trade-off in Synthesis for BIST

P. Bukovjan, L. Ducerf-Bourbon, M. Marzouki

Fault Models and Test Generation for OpAmp Circuits—The FFM

José Vicente Calvano, Antônio Carneiro de Mesquita Filho, Vladimir Castro Alves, Marcelo Soares Lubaszewski

A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs

F. Azaïs, S. Bernard, Y. Bertrand, M. Renovell

Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults

Érika Cota, Fernanda Lima, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis

Constraint Based Criteria: An Approach for Test Case Selection in the Structural Testing

Silvia Regina Vergilio, José Carlos Maldonado, Mario Jino

Call for Papers

Call for Papers