Journal of Electronic Testing

Editorial

Test Technology Newsletter

A Low-Cost Jitter Measurement Technique for BIST Applications

Jiun-Lang Huang, Jui-Jer Huang, Yuan-Shuang Liu

A Novel RF Test Scheme Based on a DFT Method

Jee-Youl Ryu, Bruce C. Kim, Iboun Sylla

An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults

Jack Smith, Tian Xia, Charles Stroud

Defect Simulation Methodology for iDDT Testing

Abhishek Singh, Jim Plusquellic, Dhananjay Phatak, Chintan Patel

Observability Statement Coverage Based on Dynamic Factored Use-Definition Chains for Functional Verification

Tao Lv, Jian-Ping Fan, Xiao-Wei Li, Ling-Yi Liu

ADOFs and Resistive-ADOFs in SRAM Address Decoders: Test Conditions and March Solutions

Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Simone Borri, Magali Hage-Hassan

Combining Scan Test and Built-in Self Test

Markus Seuring

Security Extension for IEEE Std 1149.1

Franc Novak, Anton Biasizzo