Journal of Electronic Testing

Editorial

Vishwani D. Agrawal

Test Technology Newsletter

Guest Editorial

Salvador Mir, Tim Cheng, Andrew Richardson

Test Development Through Defect and Test Escape Level Estimation for Data Converters

Carsten Wegener, Michael Peter Kennedy

A BIST Scheme for SNDR Testing of ΣΔ ADCs Using Sine-Wave Fitting

Luis Rolíndez, Salvador Mir, Ahcéne Bounceur, Jean-Louis Carbonéro

Next Generation ADC Massive Parallel Testing with Real Time Parameter Evaluation

Heinz Mattes, Stéphane Kirmser, Sebastian Sattler

A First Step for an INL Spectral-Based BIST: The Memory Optimization

V. Kerzérho, S. Bernard, P. Cauvet, J. M. Janik

Investigation into the Use of Hybrid Solutions for ΣΔ A/D Converter Testing

K. Georgopoulos, A. Lechner, M. Burbidge, A. Richardson

Towards Fault-Tolerant RF Front Ends

Tejasvi Das, Anand Gopalan, Clyde Washburn, P. R. Mukund

On-Chip Random Jitter Testing Using Low Tap-Count Coarse Delay Lines

Jiun-Lang Huang

Structural Fault Modeling and Fault Detection Through Neyman–Pearson Decision Criteria for Analog Integrated Circuits

Amir Zjajo, Jose Pineda de Gyvez, Guido Gronthoud

Proposal of Fault Diagnosis of Analog Circuits by Combining Operation-Region Model and X–Y Zoning Method: Case Study

Yukiya Miura

TBSA: Threshold-Based Simulation Accuracy Method for Fast Analog DC Fault Simulation

Michel Morneau, Abdelhakim Khouas

A 1-MHz Area-Efficient On-Chip Spectrum Analyzer for Analog Testing

M. A. Domínguez, J. L. Ausín, J. F. Duque-Carrillo, G. Torelli

Built-In-Self-Testing Techniques for Programmable Capacitor Arrays

Amit Laknaur, Sai Raghuram Durbha, Haibo Wang

Embedded System Level Self-Test for Mixed-Signal IO Verification

V. Loukusa

Lifetime Prediction and Design-for-Reliability of IC Interconnections with Electromigration Induced Degradation in the Presence of Manufacturing Defects

Xiangdong Xuan, Adit D. Singh, Abhijit Chatterjee